EPF10K50VQC240-3 Datasheet, PDF (87/128 Pages) Altera Corporation – Embedded Programmable Logic Device Family

FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Table 68. EPF10K100 Device Interconnect Timing Microparameters Note (1)
Symbol
-3DX Speed Grade -3 Speed Grade -4 Speed Grade Unit
Min
t_DIN2IOE
t_DIN2LE
t_DIN2DATA
t_DCLK2IOE without ClockLock or
ClockBoost circuitry
t_DCLK2IOE with ClockLock or ClockBoost
circuitry
t_DCLK2LE without ClockLock or
ClockBoost circuitry
t_DCLK2LE with ClockLock or ClockBoost
circuitry
t_SAMELAB
t_SAMEROW
t_SAMECOLUMN
t_DIFFROW
t_TWOROWS
t_LEPERIPH
t_LABCARRY
t_LABCASC
Max Min Max Min Max
10.3
4.8
7.3
6.2
10.3
12.2
ns
4.8
6.0
ns
7.3
11.0
ns
6.2
7.7
ns
2.3
–
–
ns
4.8
4.8
6.0
ns
2.3
–
–
ns
0.4
0.4
0.5
ns
4.9
4.9
5.5
ns
5.1
5.1
5.4
ns
10.0
10.0
10.9
ns
14.9
14.9
16.4
ns
6.9
6.9
8.1
ns
0.9
0.9
1.1
ns
3.0
3.0
3.2
ns
Altera Corporation
87