EPF10K100ARI240-3 Datasheet, PDF (82/128 Pages) Altera Corporation – Embedded Programmable Logic Device Family

FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Table 61. EPF10K70 Device Interconnect Timing Microparameters Note (1)
Symbol
t_DIN2IOE
t_DIN2LE
t_DIN2DATA
t_DCLK2IOE
t_DCLK2LE
t_SAMELAB
t_SAMEROW
t_SAMECOLUMN
t_DIFFROW
t_TWOROWS
t_LEPERIPH
t_LABCARRY
t_LABCASC
-2 Speed Grade
Min
Max
6.6
4.2
6.5
5.5
4.2
0.4
4.8
3.3
8.1
12.9
5.5
0.8
2.7
-3 Speed Grade
Min
Max
7.3
4.8
7.1
6.2
4.8
0.4
4.9
3.4
8.3
13.2
5.7
0.9
3.0
-4 Speed Grade
Unit
Min
Max
8.8
ns
6.0
ns
10.8
ns
7.7
ns
6.0
ns
0.5
ns
5.5
ns
3.7
ns
9.2
ns
14.7
ns
6.5
ns
1.1
ns
3.2
ns
Table 62. EPF10K70 Device External Timing Parameters Note (1)
Symbol
t_DRR
t_INSU (2), (3)
t_INH (3)
t_OUTCO (3)
-2 Speed Grade
Min
Max
17.2
6.6
0.0
2.0
9.9
-3 Speed Grade
Min
Max
19.1
7.3
0.0
2.0
11.1
-4 Speed Grade
Unit
Min
Max
24.2
ns
8.0
ns
0.0
ns
2.0
14.3
ns
Table 63. EPF10K70 Device External Bidirectional Timing Parameters Note (1)
Symbol
t_INSUBIDIR
t_INHBIDIR
t_OUTCOBIDIR
t_XZBIDIR
t_ZXBIDIR
-2 Speed Grade
Min
Max
7.4
0.0
2.0
9.9
13.7
13.7
-3 Speed Grade
Min
Max
8.1
0.0
2.0
11.1
15.4
15.4
-4 Speed Grade
Unit
Min
Max
10.4
ns
0.0
ns
2.0
14.3
ns
18.5
ns
18.5
ns
82
Altera Corporation