EP4SGX180DF29I3N Datasheet, PDF (72/82 Pages) Altera Corporation – Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum

1–64
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Glossary
Glossary
Table 1–54 lists the glossary for this chapter.
Table 1–54. Glossary Table (Part 1 of 4)
Letter
A, B, C
Subject
—
Receiver Input Waveforms
Single-Ended Waveform
V_ID
V_CM
Definitions
—
Positive Channel (p) = V_IH
Negative Channel (n) = V_IL
Ground
Differential Waveform
V_ID
D
Differential I/O
Standards
Transmitter Output Waveforms
Single-Ended Waveform
V_CM
V_OD
p−n=0V
V_ID
Positive Channel (p) = V_OH
Negative Channel (n) = V_OL
Ground
E
—
f_HSCLK
F
f_HSDR
f_HSDRDPA
G, H, I
—
Differential Waveform
V_OD
p−n=0V
V_OD
—
Left/right PLL input clock frequency.
High-speed I/O block: Maximum/minimum LVDS data transfer rate
(f_HSDR = 1/TUI), non-DPA.
High-speed I/O block: Maximum/minimum LVDS data transfer rate
(f_HSDRDPA = 1/TUI), DPA.
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Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
January 2014 Altera Corporation