DE2-115 Datasheet, PDF(59/116 Page) Altera Corporation – The DE2-115 package contains all components needed to use the DE2-115 board in conjunction with a computer that runs the Microsoft Windows OS.

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DE2-115 Datasheet, PDF (59/116 Pages) Altera Corporation – The DE2-115 package contains all components needed to use the DE2-115 board in conjunction with a computer that runs the Microsoft Windows OS.

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Table 4-22

JP2 Jumper Settings

Short Pins 1 and 2

Short Pins 2 and 3

Jumper Settings for Working Mode of ENET1 (U9)

ENET1 PHY Working Mode

RGMII Mode

MII Mode

Signal Name

ENET0_GTX_CLK

ENET0_INT_N

ENET0_LINK100

ENET0_MDC

ENET0_MDIO

ENET0_RST_N

ENET0_RX_CLK

ENET0_RX_COL

ENET0_RX_CRS

ENET0_RX_DATA[0]

ENET0_RX_DATA[1]

ENET0_RX_DATA[2]

ENET0_RX_DATA[3]

ENET0_RX_DV

ENET0_RX_ER

ENET0_TX_CLK

ENET0_TX_DATA[0]

ENET0_TX_DATA[1]

ENET0_TX_DATA[2]

ENET0_TX_DATA[3]

ENET0_TX_EN

ENET0_TX_ER

ENET1_GTX_CLK

ENET1_INT_N

ENET1_LINK100

ENET1_MDC

ENET1_MDIO

ENET1_RST_N

ENET1_RX_CLK

ENET1_RX_COL

ENET1_RX_CRS

ENET1_RX_DATA[0]

ENET1_RX_DATA[1]

ENET1_RX_DATA[2]

ENET1_RX_DATA[3]

ENET1_RX_DV

ENET1_RX_ER

Table 4-23 Pin Assignments for Fast Ethernet

FPGA Pin No.

PIN_A17

PIN_A21

PIN_C14

PIN_C20

PIN_B21

PIN_C19

PIN_A15

PIN_E15

PIN_D15

PIN_C16

PIN_D16

PIN_D17

PIN_C15

PIN_C17

PIN_D18

PIN_B17

PIN_C18

PIN_D19

PIN_A19

PIN_B19

PIN_A18

PIN_B18

PIN_C23

PIN_D24

PIN_D13

PIN_D23

PIN_D25

PIN_D22

PIN_B15

PIN_B22

PIN_D20

PIN_B23

PIN_C21

PIN_A23

PIN_D21

PIN_A22

PIN_C24

Description

GMII Transmit Clock 1

Interrupt open drain output 1

Parallel LED output of 100BASE-TX link 1

Management data clock reference 1

Management data 1

Hardware reset signal 1

GMII and MII receive clock 1

GMII and MII collision 1

GMII and MII carrier sense 1

GMII and MII receive data[0] 1

GMII and MII receive data[1] 1

GMII and MII receive data[2] 1

GMII and MII receive data[3] 1

GMII and MII receive data valid 1

GMII and MII receive error 1

MII transmit clock 1

MII transmit data[0] 1

MII transmit data[1] 1

MII transmit data[2] 1

MII transmit data[3] 1

GMII and MII transmit enable 1

GMII and MII transmit error 1

GMII Transmit Clock 2

Interrupt open drain output 2

Parallel LED output of 100BASE-TX link 2

Management data clock reference 2

Management data 2

Hardware reset signal 2

GMII and MII receive clock 2

GMII and MII collision 2

GMII and MII carrier sense 2

GMII and MII receive data[0] 2

GMII and MII receive data[1] 2

GMII and MII receive data[2] 2

GMII and MII receive data[3] 2

GMII and MII receive data valid 2

GMII and MII receive error 2

I/O Standard

2.5V

3.3V

2.5V

3.3V

2.5V

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