DE2-115 Datasheet, PDF(30/116 Page) Altera Corporation – The DE2-115 package contains all components needed to use the DE2-115 board in conjunction with a computer that runs the Microsoft Windows OS.

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

DE2-115 Datasheet, PDF (30/116 Pages) Altera Corporation – The DE2-115 package contains all components needed to use the DE2-115 board in conjunction with a computer that runs the Microsoft Windows OS.

◁

Chapter 4

Using the DE2-115 Board

This chapter gives instructions for using the DE2-115 board and describes each of its peripherals.

4.1 Configuring the Cyclone IV E FPGA

The procedure for downloading a circuit from a host computer to the DE2-115 board is described in

the tutorial Quartus II Introduction. This tutorial is found in the DE2_115_tutorials folder on the

DE2-115 System CD. The user is encouraged to read the tutorial first, and treat the information

below as a short reference.

The DE2-115 board contains a serial configuration device that stores configuration data for the

Cyclone IV E FPGA. This configuration data is automatically loaded from the configuration device

into the FPGA every time while power is applied to the board. Using the Quartus II software, it is

possible to reconfigure the FPGA at any time, and it is also possible to change the non-volatile data

that is stored in the serial configuration device. Both types of programming methods are described

below.

1. JTAG programming: In this method of programming, named after the IEEE standards Joint

Test Action Group, the configuration bit stream is downloaded directly into the Cyclone IV E

FPGA. The FPGA will retain this configuration as long as power is applied to the board; the

configuration information will be lost when the power is turned off.

2. AS programming: In this method, called Active Serial programming, the configuration bit

stream is downloaded into the Altera EPCS64 serial configuration device. It provides

non-volatile storage of the bit stream, so that the information is retained even when the power

supply to the DE2-115 board is turned off. When the boardâs power is turned on, the

configuration data in the EPCS64 device is automatically loaded into the Cyclone IV E FPGA.

Â JTAG Chain on DE2-115 Board

To use JTAG interface for configuring FPGA device, the JTAG chain on DE2-115 must form a

close loop that allows Quartus II programmer to detect FPGA device. Figure 4-1 illustrates the

JTAG chain on DE2-115 board. Shorting pin1 and pin2 on JP3 can disable the JTAG signals on

▷