EP2C5F256C6N Datasheet, PDF (46/168 Pages) Altera Corporation – Section I. Cyclone II Device Family Data Sheet

Embedded Multipliers
Figure 2–18. Multiplier Block Architecture
signa (1)
signb (1)
aclr
clock
ena
Data A
Data B
DQ
ENA
CLRN
DQ
ENA
CLRN
DQ
ENA
CLRN
Input
Register
Output
Register
Embedded Multiplier Block
Note to Figure 2–18:
(1) If necessary, these signals can be registered once to match the data signal path.
Data Out
Each multiplier operand can be a unique signed or unsigned number.
Two signals, signa and signb, control the representation of each
operand respectively. A logic 1 value on the signa signal indicates that
data A is a signed number while a logic 0 value indicates an unsigned
number. Table 2–11 shows the sign of the multiplication result for the
various operand sign representations. The result of the multiplication is
signed if any one of the operands is a signed value.
Table 2–11. Multiplier Sign Representation
Data A (signa Value)
Unsigned
Unsigned
Signed
Signed
Data B (signb Value)
Unsigned
Signed
Unsigned
Signed
Result
Unsigned
Signed
Signed
Signed
2–34
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2007