EV1380QI Datasheet, PDF (13/18 Pages) Enpirion, Inc. – 8a synchronous highly integrated dc-dc

Typical Ripple Voltages
Output Capacitor
Configuration
3 x 100 uF
Typical Output Ripple (mVp-p)
VDDQ = 1.5V, V_OUT = 0.75V
<10mV
Ternary Pins
M_S is a Ternary pin. This pin can assume
three states – A low state, a high state and a
float state. Device operation is controlled by
the state of the pin. The pins may be pulled to
ground or left floating without any special care.
However when pulling high, it is recommended
that this pin is tied to VIN with a series resistor.
Using the equations in Figure 7, the resistor
value may be optimized to reduce the current
drawn by the pin.
EV1380 Datasheet
2.5V
To V_IN
PIN
R_EXT
R3
7k
AGND
R1
100k
D1
V_f ~ 2V
R2
100k
To Gates
Maximum value of
R_EXT= (V_IN-2)*67k
Input pin current
= (V_IN -2)/R_EXT
EV1380QI
Figure 7: Selection of R_EXT to Connect Ternary
Pins to V_IN
M_S (Master/Slave) Pin States
M_S Pin
Function
Low
This is Master mode. Switching phase locked to
S_IN external clock. S_OUT outputs a delayed
version of internal PWM signal
Float
Parallel operation is disabled. Switching phase
locked to S_IN external clock. S_OUT outputs a
delayed version of switching clock
High
This is Slave mode. The S_IN signal directly
drives the power FETs. S_OUT outputs a
delayed version of S_IN
NOTE: Power Applications support can be contacted for
additional information on the Parallel operation of up to
two EV1380QIs for high output current.
08888
13
March 18, 2015
www.altera.com/enpirion
Rev C