AKD4632 Datasheet, PDF (9/48 Pages) Asahi Kasei Microsystems – AK4632 Evaluation board Rev.0

ASAHI KASEI
[AKD4632-A]
„ DIP Switch set up
[SW3] (MODE) : Mode Setting of AK4632 and AK4114
ON is “H”, OFF is “L”.
No.
Name
ON (“H”)
OFF (“L”)
1
DIF0
2
DIF1
3
CM2
AK4114 Audio Format Setting
See Table 2
4
CM0
Clock Operation Mode select
5
CM1
See Table 3
6
OCKS0
7
OCKS1
Master Clock Frequency Select
See Table 4
8
M/S
Master mode
Slave mode
Note. When the AK4632 is evaluated Master mode, “No.8 of SW3” is set to “H”.
Table 1. Mode Setting for AK4632 and AK4114
Register setting
for AK4632 Audio
Interface Format
DIF1 bit DIF0 bit
DIF0
Setting for AK4114 Audio Interface Format
DIF1
DIF2
DAUX
SDTO
0
1
L
L
L
24bit, Left justified
16bit, Right justified
1
0
L
L
H 24bit, Left justified 24bit, Left justified Default
1
1
H
L
H
24bit, I²S
24bit, I²S
Note. When the AK4632 is evaluated by using DIR/DIT of AK4114, “No.8 of SW3” is set to “L”.
Table 2. Setting for AK4114 Audio Interface Format
Mode CM1 CM0 UNLOCK PLL
X'tal Clock source SDTO
0
0
0
-
ON ON(Note)
PLL
RX
1
0
1
2
1
0
-
OFF
ON
0
ON
ON
1
ON
ON
X'tal
DAUX
PLL
X'tal
RX
DAUX
Default
3
1
1
-
ON
ON
X'tal
DAUX
ON: Oscillation (Power-up), OFF: STOP (Power-down)
Note : When the X’tal is not used as clock comparison for fs detection (i.e. XTL1,0= “1,1”), the X’tal is off.
Table 3. Clock Operation Mode select
No. OCKS1
0
0
2
1
MCKO1
256fs
512fs
MCKO2
256fs
256fs
X’tal
256fs
512fs
Default
Table 4. Master Clock Frequency Select (Stereo mode)
<KM075602>
-9-
2005/04