AKD4632 Datasheet, PDF (6/48 Pages) Asahi Kasei Microsystems – AK4632 Evaluation board Rev.0

ASAHI KASEI
[AKD4632-A]
c) Set up jumper pins of FCK clock
When an external clock through a RCA connector J9 (FCK) is supplied, select EXT on JP22 (FCK_SEL). JP24
(EXT2) and R27 should be properly selected in order to much the output impedance of the clock generator.
JP28
FCK
JP22
FCK_SEL
DIR ADC
2fs 1fs EXT
d) Set up jumper pins of DATA
When the AK4632 is evaluated by loop-back mode (A/D → D/A), the jumper pins should be set to the following.
JP30
SDTI
JP26
4632_SDTI
DIR
ADC
DAC/LOOP ^ADC
<KM075602>
-6-
2005/04