AKD4632 Datasheet, PDF (14/48 Pages) Asahi Kasei Microsystems – AK4632 Evaluation board Rev.0

ASAHI KASEI
[AKD4632-A]
C) SPK Output Circuit
Note. When mini-jack is inserted or pulled out J2 (SPK-JACK) connector, JP13 (SPP_SEL) and JP14
(SPN_SEL) should be open, or “PMSPK bit” in the AK4632 should be set to “0”.
JP31
Dynamic
R15
10
SVSS
SPP
SVSS
SVSS
D1
A
K
DIODE ZENER
D2
A
K
DIODE ZENER
JP13
Dynamic(EXT)
Piezo(EXT)
Dynamic
SPP_SEL
JP14
Dynamic(EXT)
Piezo(EXT)
Dynamic
SPN_SEL
CN5
2
1
R17
10
SPN
Figure 7. SPK Output Circuit
J2
SPK-JACK
3
4
6
SPK1
020S16
R
L
(C-1) “Dynamic Speaker” of external is evaluated by using J2 (SPK-JACK) connector.
JP13
SPP_SEL
JP14
SPN_SEL
JP31
Dynamic
Dynamic Dynamic(EXT) Dynamic Dynamic(EXT)
Piezo(EXT)
Piezo(EXT)
(C-2) “Piezo (Ceramic) Speaker” of external is evaluated by using J2 (SPK-JACK) connector.
JP13
SPP_SEL
JP14
SPN_SEL
JP31
Dynamic
Dynamic Dynamic(EXT) Dynamic Dynamic(EXT)
Piezo(EXT)
Piezo(EXT)
<KM075602>
- 14 -
2005/04