AK4456 Datasheet, PDF (80/84 Pages) Asahi Kasei Microsystems – 115dB 768kHz Advanced 32-bit DAC

[AK4456]
1. Grounding and Power Supply Decoupling
To minimize coupling by digital noise, decoupling capacitors should be connected to AVDD and TVDD
respectively. AVDD are supplied from the analog supply of the system and TVDD is supplied from the digital
supply of the system. DVSS and AVSS must be connected to the same analog ground plane.
Decoupling capacitors for high frequency should be placed as near as possible to the supply pin.
2. Voltage Reference
The differential voltage between the VREFH1/2/3 pin and the VREFL1/2/3 pin sets the analog output range.
The VREFH1/2/3 pin is normally connected to AVDD, and the VREFL1/2/3 pin is normally connected to
AVSS. VREFH1/2/3 and VREFL1/2/3should be connected with a 0.1µF ceramic capacitor as near as possible
to the pin to eliminate the effects of high frequency noise. All signals, especially clocks, should be kept away
from the VREFH1/2/3 and VREFL1/2/3 pins in order to avoid unwanted noise coupling into the AK4456.
015006886-E-00
- 80 -
2015/06