AK4640_05 Datasheet, PDF (61/78 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4640]
SYSTEM DESIGN (AK4640VG)
Figure 44 shows the system connection diagram for the AK4640VG. An evaluation board [AKD4640] is available which
demonstrates the optimum layout, power supply arrangements and measurement results.
1µ 1µ
1µ
1µ
1µ
1µ C C
1µ
1µ
RR
R
Analog Supply
2.4 ~ 3.6V
1µ
2.2k
2.2k
1µ
2.2µ ^0.1µ
10µ 0.1µ
10µ 0.1µ
10kΩ
4.7n
NC MICOUT BEEPL BEEPM MOUT+ MOUT2 MIN
HPL NC
EXT
AIN BEEPR AUXIN+ AUXIN- MOUT- NC MUTET HPR
MPE MPI
NC
HVSS HVSS
INT
VCOM
AVSS AVDD
Top View
HVDD HVDD
SPN SPN
PVDD AVDD
SPP
SPP
VCOC PVSS
XTO
M/S
CAD0 ^{CSN CCLK} CDTO SDTI BICK NC DVDD XTI
/CAD1 /SCL
/MCKI
NC
PDN CDTI I2C SDTO LRCK MCKO DVSS
NC
/SDA
10Ω
0.22µ
16Ω
6.8Ω _47µ
6.8Ω
16Ω
0.22µ
10Ω
0.1µ 10µ
Analog Supply
2.4 ~ 3.6V
8Ω
C
C
Reset
DSP and uP
10
Notes:
- AVSS, DVSS, PVSS and HVSS of the AK4640 should be distributed separately from the ground of external
controllers.
- Values of R and C in Figure 44 should depend on system.
- All input pins should not be left floating.
Figure 44. Typical Connection Diagram (AK4640VG)
MS0273-E-02
- 61 -
2005/04