AK4115 Datasheet, PDF (61/64 Pages) Asahi Kasei Microsystems – High Feature 192kHz 24bit Digital Audio Interface Transceiver

ASAHI KASEI
[AK4115]
SYSTEM DESIGN
Figure 53 shows the example of system connection diagram for 4-wire serial mode.
C1: 0.1µ
C2: 10µ
S/PDIF Sources
C1
C1
3.3V
C2
+
C1
4.7µ
+
10kΩ
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
10n
24kΩ
1 RX5
FILT 48
100p
2 TEST(AVSS)
XTL1 47
3 RX6
XTL0 46
4 PDN
PSEL 45
3.3V
C2 C1
+
5 RX7
6 DVDD
7 VIN
8 DAUX
9 DVSS
Top View
IIC 44
BVSS 43
DVSS 42
DVDD 41
CSN 40
C1 ₊ C2
10 MCKO1
CCLK 39
DSP1
11 MCKO2
12 OVDD
C1
13 OVSS
CDTI 38
uP
CDTO 37
INT1 36
14 BICK
INT0 35
15 SDTO
ELRCK 34
16 LRCK
EMCK 33
3.3V
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
C1
+
uP
C2
CCCC
C1
+ _C2
DSP2
S/PDIF out
5V
3.3V
Figure 53. Typical Connection Diagram (4-wire serial mode)
Notes:
- For setting of XTL0 and XTL1, refer the Table 13.
- “C” depends on the crystal.
- AVSS, BVSS, TVSS, OVSS and DVSS must be connected the same ground plane.
- Digital signals, especially clocks, should be kept away from the R and FILT pins in order to avoid an effect to
the clock jitter performance.
MS0573-E-00
- 61 -
2006/12