AK4115 Datasheet, PDF (56/64 Pages) Asahi Kasei Microsystems – High Feature 192kHz 24bit Digital Audio Interface Transceiver

ASAHI KASEI
[AK4115]
Clock Control
Addr
Register Name
0AH Clock Control
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
TX1NE 0 MCK1E MCK1E ASYNC WSYNC XSEL PSEL
R/W RD R/W R/W R/W R/W R/W R/W
1
0
1
1
0
0
0
0
PSEL: Setting of PLL reference clock (See Table 1)
XSEL: Setting of X’tal oscillator (See Table 12)
WSYNC: Synchronization between the biphase signal and ELRCK
0: Disable (Default)
1: Enable
ASYNC: Setting of synchronous / asynchronous mode for DIT/DIR
0: Synchronous mode (Default)
1: Asynchronous mode
MCK1E: Setting of MCKO1 output
0: Disable. Output “L”.
1: Enable (Default)
MCK2E: Setting of MCKO2 output
0: Disable. Output “L”.
1: Enable (Default)
TX1NE: Setting of TXN1 pin.
0: Disable. Output “L”. This mode is useful for consumer.
1: Enable (Default)
TX Control
Addr
Register Name
0BH TX Control
R/W
Default
D7
MSEL
RD
0
D6
ECKS1
RD
0
D5
ECKS0
R/W
1
D4
EDIF1
R/W
1
D3
EDIF0
R/W
0
D2
CTRAN
R/W
0
D1
CCRE
R/W
1
D0
VTX
R/W
0
VTX: Setting of Validity bit for TX
0: Valid (Default)
1: Invalid
CCRE: CCRC Enable at professional mode
0: CCRC data is not generated.
1: CCRC data is generated in professional mode. In consumer mode, CCRC data is not generated.
(Default)
CTRAN: Transfer mode of CR191-0 bits
0: Not transfer or finish to transfer (Default)
1: Transfer
All CR191-0 bits is transferred to CT191-0 bits when CTRAN bit changes “0” to “1”. The
transferred CT191-0 bits are valid after next block start signal is detected. CTRAN bit goes to
“0” after finishing the transfer.
EDIF1-0: Setting of audio interface mode in asynchronous mode. (See Table 30)
ECK1-0: Setting of EMCK input frequency (See Table 31)
MSEL: Master clock setting for TX in asynchronous mode (See Table 4)
MS0573-E-00
- 56 -
2006/12