|
AK4115 Datasheet, PDF (22/64 Pages) Asahi Kasei Microsystems – High Feature 192kHz 24bit Digital Audio Interface Transceiver | |||
|
◁ |
ASAHI KASEI
[AK4115]
1. Channel Status bit
1-1. RX
The data recovered from the bi-phase input signal is stored in CR191-0 bits. When the BCU_IO bit = â1â, the channel
status bits are available on the C pin according to the block signal timing. The channel status bits are outputted from
SDTO pin with audio data in AES3 mode.
1-2. TX
The channel status bit can controlled by the CT191-0 bits. When BCU_IO bit is â0â, the channel status bits are also
controlled by C pin. CT191-0 bits and the signal on the C pin are ORed internally.
The input to C pin is ignored in AES3 mode. When CTX bit is set to â0â, the channel status bits on DAUX pin are
outputted with audio data from TX. When CTX bit is set to â1â, the values of CT191-0 bits are outputted with audio data
from TX.
When the CCRE bit is â1â and AK4115 is in professional mode (bit0 = â1â), the CRC code can be generated according
to the professional mode definition in the AES3 standard. When the CCRE bit is â0â, the CRC data is not generated and
the data from the CT191-0 bits is passed to the TX directly. In the consumer mode (bit0 = â0â), the CRC code is not
generated.
In the consumer mode (bit0 = â0â), bits20-23(audio channel) must be controlled by the CT20 bit. When the CT20 bit is
â1â, the AK4115 corresponds to âstereo modeâ, bits20-23 are set to â1000â(left channel) in sub-frame 1, and is set to
â0100â(right channel) in sub-frame 2. When the CT20 bit is â0â, bits20-23 is set to â0000â in both sub-frame 1 and
sub-frame 2.
All CR191-0 bits are transferred to CT191-0 bits when the CTRAN bit changes from â0â to â1â. The transferred
CT191-0 bits are valid after the next block start signal is detected. CTRAN bit goes to â0â after finishing the transfer.
Donât write to the CT191-0 bits when the CTRAN bit = â1â.
2. User bit
2-1. RX
When the BCU_IO bit is â1â, the recovered user bit is available on the U pin according to block start timing. The user
bits are outputted from SDTO pin with audio data in AES3 mode.
2-2. TX
When the BCU_IO bit is â0â, the user bit is sent to the U pin according to block start timing. When BCU_IO bit is â1â
and the ASYNC bit is â0â(synchronous mode), the user bit is controlled by the UDIT bit. When the UDIT bit is â0â, user
bit is set to â0â. When the UDIT bit is â1â, the recovered U bits are used for DIT( DIR-DIT loop mode of U bit). This
mode (UDIT bit = â1â) is enabled when the PLL is locked. The input to U pin is ignored in AES3 mode and the user bits
on DAUX pin are outputted with audio data from TX.
MS0573-E-00
- 22 -
2006/12
|
▷ |