AKD4671-B Datasheet, PDF (6/51 Pages) Asahi Kasei Microsystems – stereo CODEC with built-in Microphone-Amplifier

[AKD4671-B]
(2) External Master Mode
The AK4671 becomes EXT Master Mode by setting PMPLL bit = “0” and M/S bit = “1”. Master clock can be input
via MCKI pin, without using on-chip PLL circuit. The clock required to operate is MCKI (256fs, 384fs, 512fs,
768fs or 1024fs). The input frequency of MCKI is selected by FS1-0 bits.
AK4671
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
256fs, 384fs, 512fs,
768fs or 1024fs
DSP or μP
MCLK
32fs or 64fs
BCLK
1fs
LRCK
SDTI
SDTO
(2-1) Evaluation of A/D using DIT of AK4114
X2 (X’tal) and PORT2 (DIT) are used. Nothing should be connected to PORT1 (DIR) and PORT4 (DSP).
In Master Mode, BICK and LRCK of AK4671 should be input to AK4114. Please refer to Table 2 on page 19.
The jumper pins should be set as the following.
JP36
MCLK
DIR
EXT
JP33
JP38
BICK_SEL LRCK_SEL
JP35
PHASE
JP46
4114_MCKI
JP48
M/S
DIR 4040 DIR 4040 THR INV
Master Slave
(2-2) Evaluation of D/A using DIR of AK4114
PORT1 (DIR) is used. Nothing should be connected to PORT2 (DIT) and PORT4 (DSP).
In Master Mode, BICK and LRCK of AK4671 should be input to AK4114. Please refer to Table 2 on page 19.
The jumper pins should be set as the following.
JP36
MCLK
DIR
EXT
JP33
BICK_SEL
JP38
JP51
LRCK_SEL SDTI_SEL
JP35
PHASE
JP48
M/S
DIR 4040 DIR 4040 DIR ADC THR INV Master Slave
<KM089000>
-6-
2007 / 05