AK4122_1 Datasheet, PDF (37/54 Pages) Asahi Kasei Microsystems – 24-Bit 96kHz SRC with DIR

ASAHI KASEI
[AK4122]
„ Register Definitions
Addr Register Name
00H PDN & Mode Control
R/W
Default
D7
XTL1
R/W
1
D6
XTL0
R/W
1
D5
D4
D3
D2
D1
D0
TXE SMUTE DEAU DEM1 DEM0 PWN
R/W
R/W
R/W
R/W
R/W
R/W
1
0
0
0
1
1
PWN:
Power Down Control
0 : Power down
1 : Normal operation (Default)
“0” powers down all sections. The contents of all register are not initialized and enabled to write to the
registers. The internal registers (00H ∼ 06H) are not initialized, however, the status registers (07H ∼ 1CH)
are initialized. Read/Write operations to the registers are enabled.
DEM1-0: De-emphasis Control (Table 12, 13)
Initial values are “01”.
DEAU:
De-emphasis Auto Control
0 : Disable (Default)
1 : Enable
When DEAU bit = “1”, the de-emphasis filter is enabled automatically by sampling frequency and
pre-emphasis information in the channel status.
SMUTE: Soft Mute Control
0 : Normal operation (Default)
1 : SDTIO and SDTO soft mute
When SMUTE bit = “1”, SDTO and SDTIO outputs “L”.
TXE: TX Output enable
0 : Disable, TX outputs “L”.
1 : Enable (Default)
XTL1-0: Reference MCLK Frequency Select (Table 16)
Initial values are “11”.
MS0267-E-03
- 37 -
2004/08