AK4122_1 Datasheet, PDF (27/54 Pages) Asahi Kasei Microsystems – 24-Bit 96kHz SRC with DIR

ASAHI KASEI
[AK4122]
„ Sampling Frequency and Pre-emphasis Detection
The AK4122 has two methods for detecting the sampling frequency. The sampling frequency is detected by comparing
the recovered clock to the MCLK2 or OMCLK frequency, and the detected frequency is reported on FS3-0 bits. XTL1-0
bits, ICKS1-0 bits and OCKS1-0 bits can select reference MCLK2 and OMCLK (Table 16). When XTL1-0 bits = “11”,
the sampling frequency is detected by the channel status sampling frequency information. The detected frequency is
reported on FS3-0 bits. The default values of FS3-0 bits are “0001”. In case of detecting the sampling frequency by
MCLK when DIR is used, MCLK (MCLK2 or OMCLK) of selected output port (PORT2 or PORT3) should be input.
XTL1
0
0
1
1
XTL0
0
1
0
1
MCLK2 or OMCLK
ICKS1 / OCKS1 ICKS0 / OCKS0
MCLK Frequency
0
0
11.2896MHz
0
1
22.5792MHz
1
0
16.9344MHz
1
1
33.8688MHz
0
0
12.288MHz
0
1
24.576MHz
1
0
18.432MHz
1
1
36.864MHz
0
0
24.576MHz
0
1
N/A
1
0
36.864MHz
1
1
N/A
-
-
Use channel status
Table 16. Reference MCLK Frequency
Default
Register Output
FS3 FS2 FS1 FS0
0000
0001
0010
0011
1000
1010
fs
44.1kHz
Reserved
48kHz
32kHz
88.2kHz
96kHz
Except XTL1-0 bit = “11”
Clock comparison
(Note 1)
± 3%
-
± 3%
± 3%
± 3%
± 3%
Table 17. fs Information
XTL1-0 bit = “11”
Consumer Mode
(Note 2)
Professional Mode
Byte3
Byte0
Byte4
Bit3,2,1,0
Bit7,6 Bit6,5,4,3
0000
01
0000
0001
(others)
0000
0010
10
0000
0011
11
0000
(1000)
00
1010
(1010)
00
0010
Note 1. At least ±3% range is identified as the value in the Table 17. In case of an intermediate frequency of these two,
FS3-0 bits indicate the nearer value. When the frequency is much larger than 96kHz or much smaller than 32kHz,
FS3-0 bits may indicate “1100”, “1110” or “0001”.
Note 2. In consumer mode, Byte3 Bit3-0 are copied to FS3-0.
The pre-emphasis information is detected and reported on the PEM bit. This information is extracted from channel 1 by
default (CS12 bit = “0”). It can be switched to channel 2 by changing the CS12 bit in the control register.
PEM bit
0
1
Consumer mode Professional mode
Pre-emphasis
Byte0
Byte0
Bit3,4,5
Bit2,3,4
OFF
≠ 0X100
≠ 100
ON
0X100
100
Table 18. PEM Information
MS0267-E-03
- 27 -
2004/08