AK4560A Datasheet, PDF (33/47 Pages) Asahi Kasei Microsystems – 16bit CODEC with ALC and MIC/HP/SPK-Amps

ASAHI KASEI
[AK4560A]
n LINEOUT
The signals of DAC or Analog Through Mode are gained to +7.5dB (@VA= 2.8V, Vol1-0 bit = “10”, refer to Figure 22)
internally, and its signal is output from LINEOUT. This gain can be changed by VOL1-0 bits.
Output level of LINEOUT is +2dBV and centered HVCM voltage. Load resistance is min. 10kΩ. (Refer to Figure 19)
Power supply voltage for LINEOUT is supplied from HVDD voltage. The supplied HVDD voltage does not change
output level of LINEOUT. But if HVDD voltage is low, a distortion characteristic of LINEOUT is bad.
LOUT1 and ROUT1 outputs are muted by LOUT bit. Then LOUT1 and ROUT1 pins output HVCM voltage and enter
Power-Save-Mode. (Refer to Figure 20). When LOUTP bit is “0”, LOUT1 and ROUT1 pins become Power-Down-Mode
and output signal is Hi-z. (Refer to Figure 21)
When PD pin changes from “L” to “H” after power-up, LOUT1 and ROUT1 pins become Power-Save-Mode. In
Power-Save-Mode, LOUT1 and ROUT1 pins gradually become HVCM voltage via an internal resistor (R1: typ.200kΩ)
from Hi-z to decrease a pop noise. And when Power OFF, the pop noise can be decreased by controlling via Power-
Save-Mode.
LOUT
LOUT
LOUT
-
LOUT
+
R1
LOUT1/ROUT1
LOUTP
C1
R2
Figure 19. LINEOUT Normal Operation
LOUT
LOUT
LOUT1/ROUT1
LOUT
LOUT LOUTP
C1
-
+
R2
R1
Figure 20. LINEOUT Power-Save-Mode
LOUT
LOUT
LOUT1/ROUT1
LOUT
LOUT LOUTP
C1
-
+
R2
R1
Figure 21. LINEOUT Power-Down-Mode
MS0028-E-00
- 33 -
2000/05