AK4560A Datasheet, PDF (25/47 Pages) Asahi Kasei Microsystems – 16bit CODEC with ALC and MIC/HP/SPK-Amps

ASAHI KASEI
[AK4560A]
Operation Mode
Addr Register Name
D7
D6
D5
D4
D3
07H Operation Mode
0
0
STAT ND ALC2
R/W
RD
RESET
0
0
0
0
1
ALC1: ALC1 Enable Flag
0: Disable (RESET)
1: Enable
FDOUT: FADEOUT Enable Flag
0: Disable (RESET)
1: Enable
FDIN: FADEIN Enable Flag
0: Disable (RESET)
1: Enable
* When FADEIN or FADEOUT operation is done, ALC1 bit should always be “1”.
D2
FDIN
R/W
0
D1
FDOUT
0
D0
ALC1
0
ALC2: ALC2 Enable Flag
0: Disable
1: Enable (RESET)
After initializing cycle (2048/fs=42.7ms@fs=48kHz), ALC2 is enabled. This initializing cycle
starts when PD pin change “L” to “H” or SPKP bit change from “0” to “1”.
ND: REF6-0 value of ALC1 is decreased to –3.5dB.
0: Keep REF6-0 value of ALC1 (RESET)
1: Decrease –3.5dB from REF6-0 value of ALC1
This bit and ND pin are ORed.
When this function is controlled by ND pin, ND bit is fixed to “0”. When this function is
controlled by ND bit, ND pin is fixed to “L”.
STAT: Status Flag
0: In case of ALC1 (including FADEIN, FADEOUT and Noise Decreasing function) operation
or initializing cycle. (RESET)
1: Manual Mode
STAT bit is “0” during initilizing operation after exiting power-down by PD pin. After the
finish of the initilizing operation, STAT bit becomes “1”.
During the ALC1 operation, STAT bit becomes “1” after the max “1” ATT/GAIN operation is
completed by internal state.
MS0028-E-00
- 25 -
2000/05