AK4618 Datasheet, PDF (27/60 Pages) Asahi Kasei Microsystems – 192kHz 24-bit 6ch/12ch Audio CODEC with Microphone Interface

[AK4618]
(2) TDM Mode
The audio serial interface format is set in TDM mode by the TDM1-0 bits = “01”. Five modes can be selected by the
DIF2-0 bits as shown in Table 11. In all modes the serial data is MSB-first, 2’s compliment format. The SDTO is clocked
out on the rising edge of BICK and the SDTI1/2/3 are latched on the rising edge of BICK.
TDM512 mode can be set by TDM1-0 bits as show in Table 11. In the TDM512 mode (fs = 48kHz), the serial data of all
ADC (six channels) is output to the SDTO1 pin, SDTO2/3 pin = “L”. And the serial data of all DAC (twelve channels) is
input to the SDTI1 pin. The input data to SDTI2-6 pins are ignored and the SDTI6 pin is used as the TDMI pin in TDM
cascade Mode(Figure 32). BICK should be fixed to 512fs. “H” time and “L” time of LRCK should be 1/512fs at least.
TDM256 mode can be set by TDM1-0 bits as show in Table 12. In the TDM256 mode (fs =48, 96kHz), the serial data of
all ADC (six channels) is output to the SDTO1 pin, SDTO2/3 pin = “L”. And the serial data of DAC (eight channels; L1,
R1, L2, R2, L3, R3, L4, R4) is input to the SDTI1 pin. Other four data (L5, R5, L6, R6) are input to the SDTI2 pin. The
input data to SDTI3-6 pins are ignored and the SDTI6 pin is used as the TDMI pin in TDM cascade Mode(Figure 32).
BICK should be fixed to 256fs. “H” time and “L” time of LRCK should be 1/256fs at least. TDM128 mode can be set by
TDM1-0 bits as show in Table 13.
TDM128 mode can be set by TDM1-0 bits as show in Table 13. In TDM128 mode (fs=192kHz), SDTO1/2/3 pin = “L”.
And the serial data of DAC (four channels; L1, R1, L2, R2) is input to the SDTI1 pin and the serial data of DAC (four
channels; L3, R3, L4, R4) is input to the SDTI2 pin, the serial data of DAC (four channels; L5, R5, L6, R6) is input to the
SDTI3 pin. The input data to SDTI4-6 pins are ignored. BICK should be fixed to 128fs. “H” time and “L” time of LRCK
should be 1/128fs at least.
Mode M/S TDM1 TDM0 DIF2 DIF1 DIF0 SDTO1
SDTI1
10
0
0
11
0
0
12
0
0
13
0
0
14
0
0
15
1
0
16
1
0
17
1
0
18
1
0
19
1
0
1
0
0
0
24bit, Left 16bit, Right
justified
justified
1
0
0
1
24bit, Left 20bit, Right
justified
justified
1
0
1
0
24bit, Left 24bit, Right
justified
justified
1
0
1
1
24bit, Left
justified
24bit, Left
justified
1
1
0
0
24bit, I²S
24bit, I²S
1
0
0
0
24bit, Left 16bit, Right
justified
justified
1
0
0
1
24bit, Left 20bit, Right
justified
justified
1
0
1
0
24bit, Left 24bit, Right
justified
justified
1
0
1
1
24bit, Left
justified
24bit, Left
justified
1
1
0
0
24bit, I²S
24bit, I²S
Table 11. Audio Data Formats (TDM512 mode)
LRCK
I/O
I
BICK
I/O
512fs I
 I 512fs I
 I 512fs I
 I 512fs I
 I 512fs I
 O 512fs O
 O 512fs O
 O 512fs O
 O 512fs O
 O 512fs O
015000617-E-00
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2015/01