AK4618 Datasheet, PDF (16/60 Pages) Asahi Kasei Microsystems – 192kHz 24-bit 6ch/12ch Audio CODEC with Microphone Interface

TDM128 mode (TDM1-0 bits = “11”)
(Note 14)
BICK Period
BICK Pulse Width Low
Pulse Width High
LRCK Edge to BICK “”
(Note 16)
BICK “” to LRCK Edge
(Note 16)
SDTI Hold Time
SDTI Setup Time
tBCK
40
tBCKL
16
tBCKH
16
tLRB
10
tBLR
10
tSDH
10
tSDS
10
[AK4618]
ns
ns
ns
ns
ns
ns
ns
Parameter
Symbol Min.
Typ.
Max.
Unit
Audio Interface Timing (Master mode)
Stereo mode (TDM1-0 bits = “00”)
for Normal Speed mode
BICK Frequency
BICK Duty
BICK “” to LRCK
BICK “” to SDTO
SDTI Hold Time
SDTI Setup Time
fBCK
-
64fs
-
Hz
dBCK
-
50
-
%
tMBLR 80
-
80
ns
tBSD
80
-
80
ns
tSDH
50
-
-
ns
tSDS
50
-
-
ns
Stereo mode (TDM1-0 bits = “00”)
for Double and Quad Speed mode
BICK Frequency
fBCK
-
64fs
-
Hz
BICK Duty
SDTI Hold Time
(Note 17) dBCK
-
50
-
%
tSDH
10
-
-
ns
SDTI Setup Time
tSDS
10
-
-
ns
TDM512 mode (TDM1-0 bits = “01”)
(Note 12)
BICK Frequency
fBCK
-
512fs
-
Hz
BICK Duty
(Note 17) _dBCK
-
50
-
%
BICK “” to LRCK
tMBLR -10
10
ns
SDTO Setup time BICK “”
tBSS
6
-
-
ns
SDTO Hold time BICK “”
tBSH
5
-
-
ns
SDTI/TDMI Hold Time
tSDH
5
-
-
ns
SDTI/TDMI Setup Time
tSDS
6
-
-
ns
TDM256 mode (TDM1-0 bits = “10”)
(Note 13)
BICK Frequency
BICK Duty
BICK “” to LRCK
SDTO Setup time BICK “”
SDTO Hold time BICK “”
SDTI/TDMI Hold Time
SDTI/TDMI Setup Time
fBCK
-
(Note 17) _dBCK
-
tMBLR 10
tBSS
6
tBSH
5
tSDH
5
tSDS
6
256fs
50
-
-
-
-
-
-
-
10
-
--
-
Hz
%
ns
ns
ns
ns
ns
TDM128 mode (TDM1-0 bits = “11”)
(Note 14)
BICK Frequency
BICK Duty
fBCK
-
128fs
-
Hz
(Note 17) dBCK
-
50
-
%
BICK “” to LRCK
SDTI Hold Time
SDTI Setup Time
tMBLR 10
-
tSDH
10
-
tSDS
10
-
10
ns
-
ns
-
ns
Note 16. BICK rising edge must not occur at the same time as LRCK edge.
Note 17. The case that duty of MCLK is 50%.
015000617-E-00
- 16 -
2015/01