AK4528_04 Datasheet, PDF (12/29 Pages) Asahi Kasei Microsystems – High Performance 24Bit 96kHz Audio CODEC

ASAHI KASEI
[AK4528]
„ Audio Serial Interface Format
In case of serial mode, the DIF0-2 bits as shown in Table 4 support five serial formats. In case of parallel mode, two
formats (Mode 2 and 3) are supported by DIF pin (Table 5). In all modes the serial data is MSB-first, 2’s compliment
format. The SDTO is clocked out on the falling edge of BICK and the SDTI is latched on the rising edge.
Mode
0
1
2
3
DIF2 bit
0
0
0
0
DIF1 bit
0
0
1
1
DIF0 bit
0
1
0
1
SDTO
24bit, MSB justified
24bit, MSB justified
24bit, MSB justified
24bit, I²S
4
1
0
0
24bit, MSB justified
SDTI
16bit, LSB justified
20bit, LSB justified
24bit, MSB justified
24bit, I²S
24bit, LSB justified
LRCK
H/L
H/L
H/L
L/H
H/L
BICK
≥ 32fs
≥ 40fs
≥ 48fs
≥ 48fs
Defaul
t
≥ 48fs
Table 4. Audio data format in Serial Mode
Mode
2
3
DIF pin
0
1
SDTO
24bit, MSB justified
24bit, I²S
SDTI
24bit, MSB justified
24bit, I²S
LRCK
H/L
L/H
BICK
≥ 48fs
≥ 48fs
Table 5. Audio data format in Parallel Mode
LRCK
01 23
BICK(32fs)
9 10 11 12 13 14 15 0 1 2
SDTO(o)
23 22 21
15 14 13 12 11 10 9 8 23 22 21
9 10 11 12 13 14 15 0 1
15 14 13 12 11 10 9 8 23
SDTI(i)
15 14 13
7 6 5 4 3 2 1 0 15 14 13
7 6 5 4 3 2 1 0 15
01 23
BICK(64fs)
SDTO(o)
23 22 21
17 18 19 20
7 65 43
30 31 0 1 2 3
23 22 21
17 18 19 20
76 5 43
31 0 1
23
SDTI(i)
Don’t Care 15 14 13 12 11 2 1 0 Don’t Care
SDTO-19:MSB, 0:LSB; SDTI-15:MSB, 0:LSB
Lch Data
Figure 1. Mode 0 Timing
15 14 13 12 11 2 1 0
Rch Data
LRCK
01 2
BICK(64fs)
12 13 14
24 25
SDTO(o)
23 22
12 11 10
0
31 0 1 2
12 13 14
24 25
23 22
12 11 10
0
31 0 1
23
SDTI(i)
Don’t Care 19 18
87
1 0 Don’t Care
SDTO-23:MSB, 0:LSB; SDTI-19:MSB, 0:LSB
Lch Data
Figure 2. Mode 1 Timing
19 18
87
Rch Data
10
MS0011-E-01
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2004/01