AK8825 Datasheet, PDF (11/162 Pages) Asahi Kasei Microsystems – HD/SD Multi Format Video Encoder with 3ch DAC

4. Function of Pins
4-1 AK8825VG
Pin# Pin Name
D9 CLKIN
E2 DATA0
G2 DATA1
G1 DATA2
H1 DATA3
J2 DATA4
H2 DATA5
H3 DATA6
J3 DATA7
H4 DATA8
J4 DATA9
H5 DATA10
H6 DATA11
H7 DATA12
J7 DATA13
J8 DATA14
G8 DATA15
F8 DATA16
E8 DATA17
D8 HDI
E9 VDI
[AK8825]
Power I/O
Function
Clock Input Pin
Composite Video Encoder Mode: Input 27MHz Clock.
P2
I
Component Video Encoder Mode: Either 27MHz or 74.25MHz clock is input.
(Depending on Input Video Format)
High Speed Video DAC Mode: Max input clock is 54MHz.
Prohibited Hi-z States
Data Input pin
P2
I Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2
I Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2
I Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2
I Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2
I Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2
I Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2
I Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2
I Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin =Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
Data Input pin
P2 I/O Refer “Data input Format”.
In case of PDN pin = Low, Hi-z states is possible.
In case of slave Synchronization operation mode, Horizontal Sync timing should be
P2 I/O input.
In case of PDN pin = Low, Hi-z states is possible.
In case of slave Synchronization operation mode, Vertical Sync timing should be
P2 I/O input.
In case of PDN pin = Low, Hi-z states is possible.
Rev-E-00
11
2008/03