CT2577 Datasheet, PDF (9/41 Pages) Aeroflex Circuit Technology – APPLICATION NOTE 108

processor intervention even further, the Command/Status FIFO will only store commands
that have associated data with it.
MESSAGE ILLEGALIZATION
Any message can be illegalized by applying an active low on the NME signal within 600
nSec of the rising edge of NVCR at this time. If NME signal is pulled low, the RT will respond
with a Status word having the Message Error bit set.
T0-15
NVCR
CMD WD
NME
500 nSec
600 nSec
Max
One way to implement this function is to place a latching PROM to the T0-T10 data bus. The
PROM would only have to decode 11 bits (5 bits subaddress, 5 bits word count, 1 bit T/R)
and have a one bit output to place a high/low level on the NME input pin. The upper five bits
(T11-T15) are just the Remote Terminal address for the unit which is a constant so no
decode of these bits are necessary. The latching signal for the PROM would be the NVCR
line. The NME pin will be read and acted upon 600 nSec after the rising edge of NVCR. The
NME signal would remain latched and stable until the next rising edge of NVCR.
MIL-STD-1760 FEATURES
To enable the 1760 features checksum validation, the NENCHK line is held low. This
enables the integrated on-chip hardware checksum features. The hardware automatically
checks the incoming message for the correct checksum.
1760 HEADER WORD
The signal NHDR will be an early indicator of the 1760 header word. This headerword will
appear on the T0-15 bus when the NHDR signal is low. The NHDR signal will go low on
every header word (first data word) even if the 1760 checksum circuitry is enabled or not.
NHDR is just an indicator of the first data word on the bus T0-15.
T0-15
1760 HDR WD
NHDR
500 nSec
APPLICATION NOTE #108
9
Released 9/98