CT2577 Datasheet, PDF (6/41 Pages) Aeroflex Circuit Technology – APPLICATION NOTE 108

Multibus Mode:Write strobe for a data transfer
0 = Write data FROM the Subsystem TO the Device
1 = Tri-state the Data0-15 bus
RT Status Word Discrete Inputs
The following signals are inputs to set the appropriate bits in the RT Status word. All inputs are
sampled after the NVCR signal. These RT Status Word inputs should be latched by NVCR and
remain stable until the next NVCR signal. All the inputs listed below are active low. To set any of the
appropriate bits, the user must pull that input "low" ("0")
NME
Message Error, illegalizes message. Command will not be stored in Command /
Status memory and no transfers to / from main RAM will take place. No data will be
transmitted following the status.
NTF
Sets the Terminal Flag bit
NSR
Sets the Service Request bit
NBUSY
Sets the Subsystem Busy bit
NSSFLAG Sets the Subsystem Flag bit
NDBCA
Sets the Dynamic Bus Control Accept bit in response to the Mode Code “Dynamic
Bus Control Request”
RT Discrete Signals
BCST
Output high indicates command received was a broadcast. Signal will remain high until next
command is received.
"1" = Broadcast Command was received
MCDET
Output high indicates command received was a mode command. Signal will remain high until
next command is received.
"1" = Mode Code Command was received
NCMDSTRB This signal indicates that a completely validated message has been received for
standard subaddress data activity. Mode commands with or without data will not
generate this signal. The NCMDSTRB signal is 8.5 uS long and is an indication that a
DMA burst will initiate at the end of NCMDSTRB to transfer words between the 32
word data memory and the internal main RAM. All subsystem read / writes to the
main RAM that have been acknowledged (NACK = “0") before NCMDSTRB has
begun must now be completed within 8.5 uS. All subsystem read / write requests to
the main RAM initiated after NCMDSTRB has begun will be held off (no
acknowledge) until the DMA cycle has been completed. The length of the DMA cycle
is dependant on the number of words to DMA into RAM. Access to the 32 word BTL
memory is still possible during the DMA cycle by the subsystem. However, transfers
between the BTL memory and the main RAM will be locked out.
NDBC
Active low indicates that the command received by the Remote Terminal was mode
code Dynamic Bus Control. Signal will remain low until next command is received.
APPLICATION NOTE #108
6
Released 9/98