AD9510_15 Datasheet, PDF (55/56 Pages) Analog Devices – 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs

Data Sheet
Because of the limitations of single-ended CMOS clocking,
consider using differential outputs when driving high speed
signals over long traces. The AD9510 offers both LVPECL and
LVDS outputs, which are better suited for driving long traces
where the inherent noise immunity of differential signaling
provides superior performance for clocking converters.
LVPECL CLOCK DISTRIBUTION
The low voltage, positive emitter-coupled, logic (LVPECL)
outputs of the AD9510 provide the lowest jitter clock signals
available from the AD9510. The LVPECL outputs (because they
are open emitter) require a dc termination to bias the output
transistors. A simplified equivalent circuit in Figure 41 shows
the LVPECL output stage.
In most applications, a standard LVPECL far-end termination is
recommended, as shown in Figure 56. The resistor network is
designed to match the transmission line impedance (50 Ω) and
the desired switching threshold (1.3 V).
3.3V
3.3V
50Ω
127Ω
3.3V
127Ω
LVPECL
SINGLE-ENDED
(NOT COUPLED)
LVPECL
50Ω
V_T = V_CC – 1.3V
83Ω
83Ω
Figure 56. LVPECL Far-End Termination
3.3V
LVPECL
200Ω
0.1nF
DIFFERENTIAL
0.1nF ^(COUPLED)
100Ω
200Ω
3.3V
LVPECL
Figure 57. LVPECL with Parallel Transmission Line
AD9510
LVDS CLOCK DISTRIBUTION
Low voltage differential signaling (LVDS) is a second differential
output option for the AD9510. LVDS uses a current mode
output stage with several user-selectable current levels. The
normal value (default) for this current is 3.5 mA, which yields
350 mV output swing across a 100 Ω resistor. The LVDS outputs
meet or exceed all ANSI/TIA/EIA-644 specifications.
A recommended termination circuit for the LVDS outputs is
shown in Figure 58.
3.3V
3.3V
LVDS
100Ω
DIFFERENTIAL (COUPLED)
100Ω
LVDS
Figure 58. LVDS Output Termination
See Application Note AN-586, LVDS Data Outputs for High-Speed
Analog-to-Digital Converters, for more information on LVDS.
POWER AND GROUNDING CONSIDERATIONS AND
POWER SUPPLY REJECTION
Many applications seek high speed and performance under less
than ideal operating conditions. In these application circuits,
the implementation and construction of the PCB is as important as
the circuit design. Proper RF techniques must be used for device
selection, placement, and routing, as well as for power supply
bypassing and grounding to ensure optimum performance.
Rev. B | Page 55 of 56