AD9510_15 Datasheet, PDF (27/56 Pages) Analog Devices – 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs

Data Sheet
VS GND
RSET
CPRSET VCP
250MHz
REFIN
REFINB
FUNCTION
1.6GHz
CLK1
CLK1B
SCLK
SDIO
SDO
CSB
DISTRIBUTION
REF
AD9510
SYNCB,
RESETB,
PDB
R DIVIDER
N DIVIDER
PHASE
FREQUENCY
DETECTOR
SERIAL
CONTROL
PORT
PROGRAMMABLE
DIVIDERS AND
PHASE ADJUST
/1, /2, /3... /31, /32
/1, /2, /3... /31, /32
/1, /2, /3... /31, /32
/1, /2, /3... /31, /32
/1, /2, /3... /31, /32
/1, /2, /3... /31, /32
∆T
/1, /2, /3... /31, /32
∆T
/1, /2, /3... /31, /32
PLL
REF
CHARGE
PUMP
PLL
SETTINGS
LVPECL
LVPECL
LVPECL
LVPECL
LVDS/CMOS
LVDS/CMOS
LVDS/CMOS
LVDS/CMOS
CP
STATUS
CLK2
CLK2B
1.6GHz
OUT0
OUT0B
OUT1
OUT1B
OUT2
OUT2B
1.2GHz
LVPECL
OUT3
OUT3B
OUT4
OUT4B
OUT5
OUT5B
OUT6
OUT6B
800MHz
LVDS
250MHz
CMOS
OUT7
OUT7B
Figure 33. Functional Block Diagram Showing Maximum Frequencies
AD9510
Rev. B | Page 27 of 56