AD9510_15 Datasheet, PDF (11/56 Pages) Analog Devices – 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs

Data Sheet
CLOCK OUTPUT ADDITIVE TIME JITTER
Table 6.
Parameter
LVPECL OUTPUT ADDITIVE TIME JITTER
CLK1 = 622.08 MHz
Any LVPECL (OUT0 to OUT3) = 622.08 MHz
Divide Ratio = 1
CLK1 = 622.08 MHz
Any LVPECL (OUT0 to OUT3) = 155.52 MHz
Divide Ratio = 4
CLK1 = 400 MHz
Any LVPECL (OUT0 to OUT3) = 100 MHz
Divide Ratio = 4
CLK1 = 400 MHz
Any LVPECL (OUT0 to OUT3) = 100 MHz
Divide Ratio = 4
All Other LVPECL = 100 MHz
All LVDS (OUT4 to OUT7) = 100 MHz
CLK1 = 400 MHz
Any LVPECL (OUT0 to OUT3) = 100 MHz
Divide Ratio = 4
All Other LVPECL = 50 MHz
All LVDS (OUT4 to OUT7) = 50 MHz
CLK1 = 400 MHz
Any LVPECL (OUT0 to OUT3) = 100 MHz
Divide Ratio = 4
All Other LVPECL = 50 MHz
All CMOS (OUT4 to OUT7) = 50 MHz (B Outputs Off )
CLK1 = 400 MHz
Any LVPECL (OUT0 to OUT3) = 100 MHz
Divide Ratio = 4
All Other LVPECL = 50 MHz
All CMOS (OUT4 to OUT7) = 50 MHz (B Outputs On)
LVDS OUTPUT ADDITIVE TIME JITTER
CLK1 = 400 MHz
LVDS (OUT4, OUT7) = 100 MHz
Divide Ratio = 4
CLK1 = 400 MHz
LVDS (OUT5, OUT6) = 100 MHz
Divide Ratio = 4
AD9510
Min Typ Max Unit Test Conditions/Comments
Distribution Section only, does not include
PLL or external VCO/VCXO
40
fs rms Bandwidth = 12 kHz − 20 MHz (OC-12)
55
fs rms Bandwidth = 12 kHz − 20 MHz (OC-3)
215
fs rms Calculated from signal-to-noise ratio (SNR) of
ADC method, fC = 100 MHz with AIN = 170 MHz
215
fs rms Calculated from SNR of ADC method,
fC = 100 MHz with AIN = 170 MHz
Interferer(s)
Interferer(s)
222
fs rms Calculated from SNR of ADC method,
fC = 100 MHz with AIN = 170 MHz
Interferer(s)
Interferer(s)
225
fs rms Calculated from SNR of ADC method;
fC = 100 MHz with AIN = 170 MHz
Interferer(s)
Interferer(s)
225
fs rms Calculated from SNR of ADC method,
fC = 100 MHz with AIN = 170 MHz
Interferer(s)
Interferer(s)
Distribution Section only, does not include
PLL or external VCO/VCXO
264
fs rms Calculated from SNR of ADC method,
fC = 100 MHz with AIN = 170 MHz
319
fs rms Calculated from SNR of ADC method,
fC = 100 MHz with AIN = 170 MHz
Rev. B | Page 11 of 56