ADSP-BF526_15 Datasheet, PDF (1/88 Pages) Analog Devices – Blackfin Embedded Processor

Blackfin
Embedded Processor
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
FEATURES
Up to 600 MHz high performance Blackfin processor
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
40-bit shifter
RISC-like register and instruction model for ease of
programming and compiler-friendly support
Advanced debug, trace, and performance monitoring
Accepts a wide range of supply voltages for internal and I/O
operations. See Specifications on Page 28
Programmable on-chip voltage regulator (ADSP-BF523/
ADSP-BF525/ADSP-BF527 processors only)
Qualified for Automotive Applications. See Automotive
Products on Page 87
289-ball and 208-ball CSP_BGA packages
MEMORY
132K bytes of on-chip memory (See Table 1 on Page 3 for L1
and L3 memory size details)
External memory controller with glueless support for SDRAM
and asynchronous 8-bit and 16-bit memories
Flexible booting options from external flash, SPI, and TWI
memory or from host devices including SPI, TWI, and UART
Code security with Lockbox Secure Technology
one-time-programmable (OTP) memory
Memory management unit providing memory protection
PERIPHERALS
USB 2.0 high speed on-the-go (OTG) with integrated PHY
IEEE 802.3-compliant 10/100 Ethernet MAC
Parallel peripheral interface (PPI), supporting ITU-R 656
video data formats
Host DMA port (HOSTDP)
2 dual-channel, full-duplex synchronous serial ports
(SPORTs), supporting eight stereo I²S channels
12 peripheral DMAs, 2 mastered by the Ethernet MAC
2 memory-to-memory DMAs with external request lines
Event handler with 54 interrupt inputs
Serial peripheral interface (SPI) compatible port
2 UARTs with IrDA support
2-wire interface (TWI) controller
Eight 32-bit timers/counters with PWM support
32-bit up/down counter with rotary support
Real-time clock (RTC) and watchdog timer
32-bit core timer
48 general-purpose I/Os (GPIOs), with programmable
hysteresis
NAND flash controller (NFC)
Debug/JTAG interface
On-chip PLL capable of frequency multiplication
VOLTAGE REGULATOR*
WATCHDOG TIMER
JTAG TEST AND EMULATION
PERIPHERAL
ACCESS BUS
B
INTERRUPT
CONTROLLER
L1 INSTRUCTION
MEMORY
EAB
16
USB
L1 DATA
MEMORY
DMA
CONTROLLER
DCB
DEB
DMA
ACCESS
BUS
EXTERNAL PORT
FLASH, SDRAM CONTROL
BOOT
ROM
*REGULATOR ONLY AVAILABLE ON ADSP-BF523/ADSP-BF525/ADSP-BF527 PROCESSORS
OTP MEMORY
RTC
COUNTER
SPORT0
SPORT1
UART1
UART0
NFC
PPI
SPI
TIMER7-1
TIMER0
EMAC
HOST DMA
TWI
GPIO
PORT F
GPIO
PORT G
GPIO
PORT H
PORT J
Figure 1. Processor Block Diagram
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
Rev. D
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