A3P1000-1FGG144I Datasheet, PDF (43/206 Pages) Actel Corporation – ProASIC3 Flash Family FPGAs

ProASIC3 DC and Switching Characteristics
Single-Ended I/O Characteristics
3.3 V LVTTL / 3.3 V LVCMOS
Low-Voltage Transistor–Transistor Logic (LVTTL) is a general-purpose standard (EIA/JESD) for 3.3 V
applications. It uses an LVTTL input buffer and push-pull output buffer.
Table 2-37 • Minimum and Maximum DC Input and Output Levels
Applicable to Advanced I/O Banks
3.3 V LVTTL /
3.3 V LVCMOS
Drive Strength
V_IL
V_IH
V_OL
V_OH I_OL I_OH
I_OSL
I_OSH
I_IL I_IH
Min., V Max., V Min., V Max., V Max., V Min., V mA mA Max., mA¹ Max., mA¹ µA² µA²
2 mA
–0.3 0.8
2
3.6
0.4
2.4 2 2
27
25
10 10
4 mA
–0.3 0.8
2
3.6
0.4
2.4 4 4
27
25
10 10
6 mA
–0.3 0.8
2
3.6
0.4
2.4 6 6
54
51
10 10
8 mA
–0.3 0.8
2
3.6
0.4
2.4 8 8
54
51
10 10
12 mA
–0.3 0.8
2
3.6
0.4
2.4 12 12 109
103 10 10
16 mA
–0.3 0.8
2
3.6
0.4
2.4 16 16 127
132 10 10
24 mA
–0.3 0.8
2
3.6
0.4
2.4 24 24 181
268 10 10
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
Table 2-38 • Minimum and Maximum DC Input and Output Levels
Applicable to Standard Plus I/O Banks
3.3 V LVTTL /
3.3 V LVCMOS
Drive Strength
V_IL
V_IH
V_OL
V_OH I_OL I_OH
I_OSL
I_OSH
I_IL I_IH
Min., V Max., V Min., V Max., V Max., V Min., V mA mA Max., mA¹ Max., mA¹ µA² µA²
2 mA
–0.3 0.8
2
3.6
0.4
2.4 2 2
27
25
10 10
4 mA
–0.3 0.8
2
3.6
0.4
2.4 4 4
27
25
10 10
6 mA
–0.3 0.8
2
3.6
0.4
2.4 6 6
54
51
10 10
8 mA
–0.3 0.8
2
3.6
0.4
2.4 8 8
54
51
10 10
12 mA
–0.3 0.8
2
3.6
0.4
2.4 12 12 109
103 10 10
16 mA
–0.3 0.8
2
3.6
0.4
2.4 16 16 109
103 10 10
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
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