ACE25Q400G Datasheet, PDF (8/46 Pages) ACE Technology Co., LTD. – 4M BIT SPI NOR FLASH Memory Series

ACE25Q400G
4M BIT SPI NOR FLASH Memory Series
Power-down
At Power-down (continuous decrease in VCC), as soon as VCC drops from the normal operating voltage to below the
power on reset threshold voltage, the device stops responding to any instruction sent to it. During Power-down, the
device must be deselected (Chip Select (/CS) should be allowed to follow the voltage applied on VCC) and in Standby
Power mode (that is there should be no internal Write cycle in progress).
Active Power and Standby Power Modes
When Chip Select (/CS) is Low, the device is selected, and in the Active Power mode. The device consumes ICC.
When Chip Select (/CS) is High, the device is deselected. If a Write cycle is not currently in progress, the device then
goes in to the Standby Power mode, and the device consumption drops to ICC1.
Hold Condition
The Hold (/HOLD) signal is used to pause any serial communications with the device without resetting the clocking
sequence. During the Hold condition, the Serial Data Output (SO) is high impedance, and Serial Data Input (SI) and
Serial Clock (SCLK) are Don’t Care. To enter the Hold condition, the device must be selected, with Chip Select (/CS)
Low. Normally, the device is kept selected, for the whole duration of the Hold condition. Deselecting the device while it is
in the Hold condition, has the effect of resetting the state of the device, and this mechanism can be used if it is required
to reset any processes that had been in progress.
The Hold condition starts when the Hold (/HOLD) signal is driven Low at the same time as Serial
Clock (SCLK) already being Low (as shown in Figure 1)
The Hold condition ends when the Hold (HOLD) signal is driven High at the same time as Serial Clock (C) already
being Low. Also shows what happens if the rising and falling edges are not timed to coincide with Serial Clock (SCLK)
being Low.
Figure 1 Hold condition activation
Figure 1
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