ACE25C160G Datasheet, PDF (7/36 Pages) ACE Technology Co., LTD. – Uniform SECTOR Dual and Quad Serial Flash

ACE25C160G
Uniform SECTOR Dual and Quad Serial Flash
Table1.1 ACE25C160G Protected area size (CMP=1)
Status Register Content
Memory Content
SEC TB BP2 BP1 BP0 Blocks
Addresses
Density
XX0
0
0 0 to 31 000000H-1FFFFFH
2M
000
0
1 0 to 30 000000H-1EFFFFH 1984KB
000
1
0 0 to 29 000000H-1DFFFFH 1920KB
000
1
1 0 to 27 000000H-1BFFFFH 1792KB
001
0
0 0 to 23 000000H-17FFFFH 1536KB
001
0
1 0 to 15 000000H-0FFFFFH
1M
010
0
1 1 to 31 010000H-1FFFFFH ^1984KB
010
1
0 2 to 31 020000H-1FFFFFH ^1920KB
010
1
1 4 to 31 040000H-1FFFFFH 1792KB
011
0
0 8 to 31 080000H-1FFFFFH 1536KB
011
0
1 16 to 31 100000H-1FFFFFH
1M
XX1
1
X NONE
NONE
NONE
100
0
1 ^{0 to 31 000000H-1FEFFFH 2044KB}
100
1
0 ^{0 to 31 000000H-1FDFFFH 2040KB}
100
1
1 0 to 31 000000H-01BFFFH 2032KB
101
0
X 0 to 31 000000H-1F7FFFH 2016KB
110
0
1 0 to 31 001000H-1FFFFFH 2044KB
110
1
0 0 to 31 002000H-1FFFFFH 2040KB
110
1
1 ^{0 to 31 004000H-1FFFFFH 2032KB}
111
0
X ^{0 to 31} 008000H-1FFFFFH ^2016KB
Portion
ALL
Lower 31/32
Lower 15/16
Lower 7/8
Lower 3/4
Lower 1/2
Upper 31/32
Upper 15/16
Upper 7/8
Upper 3/4
Upper 1/2
NONE
L-511/512
L-255/256
L-127/128
L-63/64
U-511/512
U-255/256
U-127/128
U-63/64
Status Register
S15
S14
S13
S12
S11
SUS
CMP
LB3
LB2
LB1
S10
Reserved
S9
S8
QE
SRP1
S7
S6
S5
S4
S3
S2
SRP0
SEC
TB
BP2
BP1
BP0
The status and control bits of the Status Register are as follows:
S1
WEL
S0
W1P
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy in program/erase/write status
register progress. When WIP bit sets to 1, means the device is busy in program/erase/write status
register progress, when WIP bit sets 0, means the device is not in program/erase/write status register
progress.
VER 1.5 7