ACE25C200G Datasheet, PDF (3/48 Pages) ACE Technology Co., LTD. – 2M BIT SPI NOR FLASH

ACE25C200G
2M BIT SPI NOR FLASH
Signal Description
During all operations, VCC must be held stable and within the specified valid range: VCC(min) to
VCC(max).
All of the input and output signals must be held High or Low (according to voltages of VIH, VOH, VIL or
VOL, see Section Table17 DC Electrical Characteristics on page 41). These signals are
Signal Names
Table 1
Pin No Pin Name
1
/CS
2
SO (IO1)
3
/WP (IO2)
4
VSS
5
SI (IO0)
6
SCLK
I/O
Description
I Chip Select
Serial Output for single bit data Instructions. IO1 for Dual or Quad
I/O
Instructions.
Write Protect in single bit or Dual data Instructions. IO2 in Quad mode.
I/O The signal has an internal pull-up resistor and may be left unconnected in
the host system if not used for Quad Instructions.
Ground
I/O ^{Serial Input for single bit data Instructions. IO0 for Dual or Quad}
Instructions.
I Serial Clock
Hold (pause) serial transfer in single bit or Dual data Instructions. IO3 in
7
/HOLD# (IO3) I/O Quad-I/O mode. The signal has an internal pull-up resistor and may be
left unconnected in the host system if not used for Quad Instructions.
8
VCC
Core and/ O Power Supply
Ordering information
ACE25C200G XX + X H
Halogen-free
U: Tube
T: Tape and Reel
Pb - free
DP: DIP-8
FM: SOP-8 (150mil)
TM: TSSOP-8
VER 1.1 3