Z86L70 Datasheet, PDF (48/61 Pages) Zilog, Inc. – IR/Low-Voltage Microcontroller

Z86L70/71/75/C71
IR/Low-Voltage Microcontroller
FUNCTIONAL DESCRIPTION (Continued)
WDT Time Select (D0, D1). Selects the WDT time period.
It is configured as shown in Table 6.
Table 6. WDT Time Select
Time-Out of
D1
D0 Internal RC OSC
0
0
5 ms min
0
1
10 ms min
1
0
20 ms min
1
1
80 ms min
Notes:
1. TpC = XTAL clock cycle.
2. The default on reset is 10 ms.
Time-Out of
XTAL Clock
256 TpC
512 TpC
1024 TpC
4096 TpC
Zilog
WDTMR During STOP (D3). This bit determines whether
or not the WDT is active during STOP Mode. Since the
XTAL clock is stopped during STOP Mode, the on-board
RC has to be selected as the clock source to the
WDT/POR counter. A 1 indicates active during STOP. The
default is 1.
Clock Source for WDT (D4). This bit determines which
oscillator source is used to clock the internal POR and
WDT counter chain. If the bit is a 1, the internal RC oscil-
lator is bypassed and the POR and WDT clock source is
driven from the external pin, XTAL1. The default configu-
ration of this bit is 0, which selects the RC oscillator.
WDTMR During HALT (D2). This bit determines whether
or not the WDT is active during HALT Mode. A 1 indicates
active during HALT. The default is 1.
1-48
PRELIMINARY
DS97LVO0500