Z86E61 Datasheet, PDF (27/44 Pages) Zilog, Inc. – CMOS Z8 16K/32K EPROM MICROCONTROLLER

PRELIMINARY
AC CHARACTERISTICS
External I/O or Memory Read and Write Timing Table
Z86E61/E63 Z8^® MCU
WITH 16K/32K EPROM
No Symbol
Parameter
1 TdA(AS)
2 TdAS(A)
3 TdAS(DR)
4 TwAS
Address Valid to /AS Rise Delay
/AS Rise to Address Float Delay
/AS Rise to Read Data Req’d Valid
/AS Low Width
5 TdAZ(DS)
Address Float to /DS Fall
6 TwDSR
/DS (Read) Low Width
7 TwDSW
/DS (Write) Low Width
8 TdDSR(DR) /DS Fall to Read Data Req’d Valid
9 ThDR(DS)
10 TdDS(A)
11 TdDS(AS)
12 TdR/W(AS)
Read Data to /DS Rise Hold Time
/DS Rise to Address Active Delay
/DS Rise to /AS Fall Delay
R//W Valid to /AS Rise Delay
13 TdDS(R/W) /DS Rise to R//W Not Valid
14 TdDW(DSW) Write Data Valid to /DS Fall (Write) Delay
15 TdDS(DW) /DS Rise to Write Data Not Valid Delay
16 TdA(DR)
Address Valid to Read Data Req’d Valid
17 TdAS(DS)
18 TdDM(AS)
/AS Rise to /DS Fall Delay
/DM Valid to /AS Fall Delay
Notes:
[1] When using extended memory timing add 2 TpC.
[2] Timing numbers given are for minimum TpC.
[3] See clock cycle dependent characteristics table.
Standard Test Load
All timing references use 2.0 V for a logic 1 and 0.8 V for a logic 0.
T
A
=
0°C
to
+70°C
16 MHz
20 MHz
Min
Max
Min
Max
20
26
30
28
180
160
35
36
0
0
135
130
80
75
75
100
0
0
35
48
30
36
20
32
30
36
25
40
30
40
200
200
40
48
30
36
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
[2,3]
[2,3]
[1,2,3]
[2,3]
[1,2,3]
[1,2,3]
[1,2,3]
[2,3]
[2,3]
[2,3]
[2,3]
[2,3]
[2,3]
[2,3]
[1,2,3]
[2,3]
[2,3]
Number
1
2
3
4
6
7
8
10
11
12
13
14
15
16
17
18
Clock Dependent Formulas
Symbol
Equation
TdA(AS)
TdAS(A)
TdAS(DR)
TwAS
0.40 TpC + 0.32
0.59 TpC – 3.25
2.83 TpC + 6.14
0.66 TpC – 1.65
TwDSR
TwDSW
TdDSR(DR)
TdDS(A)
2.33 TpC – 10.56
1.27 TpC + 1.67
1.97 TpC – 42.5
0.8 TpC
TdDS(AS)
TdR/W(AS)
TdDS(R/W)
TdDW(DSW)
0.59 TpC – 3.14
0.4 TpC
0.8 TpC – 15
0.4 sTpC
TdDS(DW)
TdA(DR)
TdAS(DS)
TdDM(AS)
0.88 TpC – 19
4 TpC – 20
0.91 TpC – 10.7
0.9 TpC – 26.3
27