Z86E61 Datasheet, PDF (13/44 Pages) Zilog, Inc. – CMOS Z8 16K/32K EPROM MICROCONTROLLER

PRELIMINARY
Z86E61/E63 Z8^® MCU
WITH 16K/32K EPROM
65535
16384 (E61)
32768 (E63)
16383 (E61)
32767 (E63)
Location of 12
First Byte of
Instruction 11
Executed
After RESET ¹⁰
9
8
7
Interrupt
Vector ₆
(Lower Byte)
5
4
Interrupt
Vector ₃
(Upper Byte)
2
1
0
External
ROM and RAM
On-Chip PROM
IRQ5
IRQ5
IRQ4
IRQ4
IRQ3
IRQ3
IRQ2
IRQ2
IRQ1
IRQ1
IRQ0
IRQ0
Figure 11. Program Memory Configuration
access registers directly or indirectly through an 8-bit
address field. The Z86E61/E63 also allows short 4-bit
register addressing using the Register Pointer (Figure 14).
In the 4-bit mode, the Register File is divided into 16
working register groups, each occupying 16 continuous
locations. The Register Pointer addresses the starting
location of the active working register group.
Stack. The Z86E61/E63 has a 16-bit Stack Pointer (R255-
R254) used for external stacks that reside anywhere in the
data memory for the ROMless mode, but only from 16384
(E61) or 32768 (E63) to 65535 in the EPROM mode. An
8-bit Stack Pointer (R255) is used for the internal stack that
resides within the 236 general-purpose registers (R239-
R4). The high byte of the Stack Pointer (SPH Bits 15-8) can
be use as a general purpose register when using internal
stack only.
65535
External
Data
Memory
Data Memory (/DM). The EPROM version can address up
to 48 Kbytes (E61) or 32 Kbytes (E63) of external data
memory space beginning at location 16384 (E61) or 32768
(E63). The ROMless version can address up to 64 Kbytes
of external data memory. External data memory may be
included with, or separated from, the external program
memory space. /DM, an optional I/O function that can be
programmed to appear on pin P34, is used to distinguish
between data and program memory space (Figure 12).
The state of the /DM signal is controlled by the type
instruction being executed. An LDC opcode references
PROGRAM (/DM inactive) memory, and an LDE instruction
references DATA (/DM active Low) memory.
Register File. The register file consists of four I/O port
registers, 236 general-purpose registers, and 16 control
and status registers (Figure 13). The instructions can
32768 (E63)
16384 (E61)
16383 (E61)
32767 (E63)
0
Not Addressable
Figure 12. Data Memory Configuration
13