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Z86E09 Datasheet, PDF (26/38 Pages) Zilog, Inc. – Z8 CMOS OTP Microcontrollers
Z86E02/E04/E08/E09 SL1995
Z8 CMOS OTP Microcontrollers
21
Figure 13. OPTION BIT READ Mode Functional Timing
VCC
5V
0V
CLEAR
VIH
VIL
EPM
VIH
VIL
CE
VIH
VIL
VPP
VIH
VIL
CLOCK
VIH
VIL
OE
VIH
VIL
PGM
VIH
VIL
Data
(Port 2)
XOUT
Not connected
Invalid
Data Out
Invalid
Power-Down Procedure
The following steps outline the power-down operation of the Z86E0x device.
1. Set up the I/O pins per Figure 14 and Table 13.
2. CE is raised to VIH.
3. EPM is lowered to GND.
4. VPP is lowered to GND.
5. VCC is lowered from 5.0V to 2.0V.
6. PGM is lowered to GND.
7. OE is lowered to GND.
8. CE is lowered to GND.
9. VCC is lowered to GND.
PS009201-0301
Programming Specification