Z86E09 Datasheet, PDF (25/38 Pages) Zilog, Inc. – Z8 CMOS OTP Microcontrollers

Z86E02/E04/E08/E09 SL1995
Z8 CMOS OTP Microcontrollers
20
Table 12. OPTION BIT PROGRAM AND VERIFY Mode Conditions (Continued)
OE
EPM
V_PP
CLEAR
CLOCK
PGM
Pin 8
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
Pin 14
See Figure 12
V_IH
V_IH
See Figure 12
See Figure 12
See Figure 12
OPTION BIT READ Mode Operation
1. Perform the Option Bit READ/WRITE Mode Entry operation (see OPTION BIT
PROGRAM AND VERIFY Mode Entry on page 16) before proceeding to Step 2.
2. CLOCK is pulsed High to V_IH, then Low to V_IL. Please refer to Table 14 for the
minimum and maximum width values of the CLOCK signal.
3. The 8 option bit values required in Table 10 are read from Port2. Option bits
D0 to D7 correspond to Port2 pins P20 to P27. Please refer to Table 14 for
setup and hold times.
4. The OPTION BIT READ operation is performed by lowering OE to V_IL and
reading the data on Port2. Pins P20 to P27 represent the option bit data D0 to
D7, respectively. See Figure 13.
5. A V_OH-level READ on Port2 corresponds to a 1 state, while a V_OL-level
corresponds to a 0 level stored in the EPROM array.
6. Please refer to Table 14 for the minimum and maximum width of OE during
EPROM READ mode and data access time.
PS009201-0301
Programming Specification