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Z86E09 Datasheet, PDF (21/38 Pages) Zilog, Inc. – Z8 CMOS OTP Microcontrollers
Z86E02/E04/E08/E09 SL1995
Z8 CMOS OTP Microcontrollers
16
Table 9. EPROM ARRAY PROGRAM AND VERIFY Mode Conditions (Continued)
NC
OE
EPM
VPP
CLEAR
CLOCK
PGM
Pin 6
Pin 8
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
Pin 7
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
Pin 14
No Connection
See Figure 10
VIH
VIH
See Figure 10
See Figure 10
See Figure 10
Option Bit Modes
Table 10 lists the device’s available option bits and their default states.
Table 10. Option Bit Values*
Bit Option
Unprogrammed Default Value
D0 ROM Protect
Disabled
D1 Low-EMI Mode
Disabled
D2 Autolatches
Enabled
D3 Reserved
Must be 1
D4 Permanent WDT
Disabled
D5 Reserved
Must be 1
D6 RC Oscillator
Disabled
D7 32-kHz Oscillator
Disabled
Note: Option bits are 0 when programmed and 1 when unprogrammed.
OPTION BIT PROGRAM AND VERIFY Mode Entry
1. To enter OPTION BIT PROGRAM AND VERIFY mode, all pins must be set as
per Table 11. The initial state for VPP and CLEAR is VIL while OE is at VIH.
2. VPP is raised to VIH.
3. CLEAR is pulsed High to VIH, then Low to VIL. See Table 14 for specifications
regarding the CLEAR signal.
4. VPP is lowered to VIL.
5. After a delay of at least 1µs minimum, VPP is raised to VIH.
PS009201-0301
Programming Specification