Z90102 Datasheet, PDF (20/36 Pages) Zilog, Inc. – 40-Pin Low-Cost Digital Television Controller

Z90102/90103/90104
40-Pin Low-Cost Digital Television Controller
FUNCTIONAL DESCRIPTION (Continued)
Stack. Either the internal register file or the external data
memory is used for the stack. An 8-bit Stack Pointer is
used for the internal stack that resides within the 236 gen-
eral-purpose registers.
Counter/Timers. There are two 8-bit programmable
counter/timers (T0-T1), each driven by its own 6-bit pro-
grammable prescaler (PRE0 and PRE1). The T1 prescaler
can be driven by internal or external clock sources; howev-
Zilog
er, the T0 prescaler is driven by the internal clock only (Fig-
ure 18).
The counter, but not the prescalers, are read at any time
without disturbing their value or count mode. The clock
source for T1 is user definable and is the internal micropro-
cessor clock (XTAL clock/4), or an external signal input
through Port 3, P31. The counter/timers are programmably
cascaded by connecting the T0 output to the input of T1.
Write
Internal Data Bus
Write
Read
OSC
Internal
Clock
PRE0
Initial Value
Register
6-Bit
¸4
Down
Counter
External Clock
Clock
Logic
¸4
6-Bit
Down
Counter
T0
Initial Value
Register
T0
Current Value
Register
8-Bit
Down
Counter
¸2
8-Bit
Down
Counter
IRQ4
Serial I/O
Clock
TOUT
P36
IRQ5
Internal Clock
Gated Clock
Triggered Clock
TIN P31
PRE1
Initial Value
Register
Write
T1
Initial Value
Register
T1
Current Value
Register
Write
Read
Internal Data Bus
Figure 18. Counter/Timer Block Diagram
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DS97TEL1902