EA218E Datasheet, PDF (5/28 Pages) Zarlink Semiconductor Inc – EA218E 8-Port Ethernet Access Controller XpressFlow 2020 Ethernet Routing Switch Chipset

PRELIMINARY
XpressFlow-2020 Series –
Ethernet Switch Chipset
INFORMATION
EA218E
8-Port 10Mb Ethernet Access Controller
1.2 Pin Assignment (Preliminary)
Note:
#
Input
In-ST
Output
Out-OD
I/O-TS
I/O-OD
5VT
Active low signal
Input signal
Input signal with Schmitt-Trigger
Output signal (Tri-State driver)
Output signal with Open-Drain driver
Input & Output signal with Tri-State driver
Input & Output signal with Open-Drain driver
Input with 5V Tolerance
Output signal with programmable polarity.
Input or output pins with weak internal pull up resistors (50k to 100k Ohms each)
These pins are reserved for internal use only. They should be left unconnected.
Pin No(s).
Symbol
Management Bus Interface
J25,K26,L24,K25,L26,
P_D[15:0]
M24,L25,M26,N24,M25,
P24,N26,N25,R24,P26, P25
C26,D24,C25,E24,D26,
P_A[11:1]
D25,F24,E26,E25,G24, F26
F25
P_ADS#
H25
P_RWC
J24
P_RDY#
G25
P_BS16#
G26
P_CS#
H26
P_INT
J26
P_RST#
K24
P_CLK
XpressFlow Bus Interface
C23,A23,B22,C22,A22
S_D[31:27] /
P_C[0:4]
B21,D20,C21,A21,B20,
A20,C20,B19,A19,C19,
B18,A18,B17,C18,A17,
D17,B16,C17,A16,B15,
A15,C16,B14,D15,A14,
C15,B13
S_D[26:0]
B12
S_MSGEN#
A12
S_EOF#
C14
S_IRDY
C13
S_TABT#
B23
S_HPREQ#
A24
S_REQ#
B24
S_GNT#
A13
S_OVLD#
D13
S_CLK
Type
Max
IOL / IOH ^{Name and Functions}
TTL I/O-TS (5VT) 16mA Management Bus – Data Bit [15:0]
TTL In (5VT)
TTL In (5VT)
TTL In (5VT)
TTL Out-OD
TTL Out-OD
TTL In (5VT)
CMOS Output
TTL In-ST (5VT)
TTL In (5VT)
Management Bus – Address Bit [11:1]
16mA
16mA
4mA
Management Bus – Address Strobe
Management Bus – Read/Write Control
Management Bus – Data Ready
Management Bus – 16 bit Data Bus
Management Bus – Chip Select
Management Bus – Interrupt Request
Management Bus – Master Reset
Management Bus – Bus Clock
CMOS I/O-TS
CMOS I/O-TS
12 mA XpressFlow Bus – Data Bit [31:27] or Manage-
ment Bus Interface Configuration bit [0:4]
12mA XpressFlow Bus – Data Bit [26:0]
CMOS I/O-TS
CMOS I/O-TS
CMOS I/O-TS
CMOS I/O-OD
CMOS I/O-OD
CMOS Output
CMOS Input
CMOS Input
CMOS Input
12 mA
12mA
12 mA
12 mA
12mA
4mA
XpressFlow Bus – Message Envelope
XpressFlow Bus – End of Frame
XpressFlow Bus – Initiator Ready
XpressFlow Bus – Target Abort
XpressFlow Bus – High Priority Request
XpressFlow Bus – Bus Request to SC201
XpressFlow Bus – Bus Grant from SC201
XpressFlow Bus – Bus Overload
XpressFlow Bus – Clock
© 1998 Zarlink Semiconductor, Inc.
4
Rev.2.1 – February, 1999