EA218E Datasheet, PDF (21/28 Pages) Zarlink Semiconductor Inc – EA218E 8-Port Ethernet Access Controller XpressFlow 2020 Ethernet Routing Switch Chipset

PRELIMINARY
XpressFlow-2020 Series –
Ethernet Switch Chipset
INFORMATION
EA218E
8-Port 10Mb Ethernet Access Controller
3. DC SPECIFICATION
3.1 ABSOLUTE MAXIMUM RATINGS
Storage Temperature
Operating Temperature
-50°C to +125°C
0°C to +70°C
Supply Voltage VDD with Respect to VSS
Voltage on 5V Tolerant Input Pins
Voltage on Other Input Pins
+3.0 V to +3.6 V
-0.5 V to (VDD + 1.8 V)
-0.5 V to (VDD + 10%)
Stresses above those listed may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Ab-
solute Maximum Ratings for extended periods may affect device reliability.
3.2 DC CHARACTERISTICS
VDD = +3.0 V to +3.6 V TAMBIENT = 0°C to +70°C
Symbol
fosc
IDD
VOH-CMOS
VOL-CMOS
VOH-TTL
VOL-TTL
VIH-CMOS
VIL-CMOS
VIH-TTL
VIL-TTL
VIH-5VT
VIL-5VT
ILI
ILO
IIH
IIL
CIN
COUT
CI/O
Notes:
Parameter Description
Frequency of Operation (-40)
Frequency of Operation (-50)
Frequency of Operation (-66)
Supply Power – @ 40 MHz (VDD =3.3 V)
Supply Power – @ 50 MHz (VDD =3.3 V)
Supply Power – @ 66.67 MHz (VDD =3.3 V)
Output High Voltage (CMOS) IOH = maximum
Output Low Voltage (CMOS) IOL = maximum
Output High Voltage (TTL) IOH = maximum
Output Low Voltage (TTL) IOL = maximum
Input High Voltage (CMOS)
Input Low Voltage (CMOS)
Input High Voltage (TTL)
Input Low Voltage (TTL)
Input High Voltage (TTL 5V tolerant)
Input Low Voltage (TTL 5V tolerant)
Input Leakage Current (0.1 V ) VIN ) VDD)
(all pins except those with internal pull-up/pull-down resis-
tors)
Output Leakage Current (0.1 V ) VOUT ) VDD)
Input Leakage Current VIH = VDD - 0.1 V
(pins with internal pull-down resistors)
Input Leakage Current VIL = 0.1 V
(pins with internal pull-up resistors)
Input Capacitance
Output Capacitance
I/O Capacitance
Preliminary
Min
Type
Max
Unit
20
40.0000
MHz
20
50.0000
MHz
20
66.6667
MHz
300
500
mA
300
500
mA
360
600
mA
VDD - 0.5
V
0.45
V
2.4
V
0.45
V
VDD x 70%
VDD + 10%
V
-0.5
VDD x 30%
V
2.0
VDD + 10%
V
-0.3
+0.8
V
2.0
VDD + 1.8
V
-0.3
+0.8
V
±10
µA
±15
µA
60
µA
-60
µA
8
pF
8
pF
10
pF
© 1998 Zarlink Semiconductor, Inc.
20
Rev.2.1 – February, 1999