EA218E Datasheet, PDF (10/28 Pages) Zarlink Semiconductor Inc – EA218E 8-Port Ethernet Access Controller XpressFlow 2020 Ethernet Routing Switch Chipset

PRELIMINARY
XpressFlow-2020 Series –
Ethernet Switch Chipset
INFORMATION
EA218E
8-Port 10Mb Ethernet Access Controller
2.1.2 Supported Memory Configurations
Read/Write Chip Select and High Address Bits
Chip #3
Chip #2
Chip #1
Chip #0
RAM Chip
Size
# of RAM
Chips
Total Buffer
Memory Size
L_WE[3]#
L_A[19] /
L_OE[3]#
L_WE[2]#
L_OE[2]#
L_WE[1]#
L_OE[1]#
L_WE[0]#
L_OE[0]#
32k x 32 1 128k bytes ----
----
----
----
----
---- L_WE[0]# L_OE[0]#
2 256k bytes ----
----
----
---- L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
4 512k bytes L_WE[3]# L_OE[3]# L_WE[2]# L_OE[2]# L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
64k x 32 1 256k bytes ----
----
----
----
----
---- L_WE[0]# L_OE[0]#
2 512k bytes ----
----
----
---- L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
4
1M bytes L_WE[3]# L_OE[3]# L_WE[2]# L_OE[2]# L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
128k x32 1 512k bytes ----
----
----
----
----
---- L_WE[0]# L_OE[0]#
2
1M bytes
----
----
----
---- L_WE[1]# L_OE[1]# L_WE[0]# L_OE[0]#
256k x32 1
1M bytes
---- L_A[19] ----
----
----
---- L_WE[0]# L_OE[0]#
2.1.3 Bus Cycle Waveforms
L_CLK
L_ADSC#
L_CS#
L_A[19:2]
L_WE[3:0]#
A1
A2
L_BWE[3:0]#
L_OE[3:0]#
A3
A3+1 A3+2 A3+3
A4 A4+1 A4+2 A4+3
A5
L_D[31:0] (Wr)
D1
L_D[31:0] (Rd)
D3 D3+1 D3+2 D3+3
D2
D4 D4+1 D4+2 D4+3
A6
D6
D5
Typical Local Memory Access Operations
© 1998 Zarlink Semiconductor, Inc.
9
Rev.2.1 – February, 1999