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| MT9072 Datasheet, PDF (244/275 Pages) Zarlink Semiconductor Inc – Octal T1/E1/J1 Framer | |||
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MT9072
Data Sheet
tCYC
tRDL
RD (DS)
tRDH
VT
tCSS
tCSH
CS
VT
tCYC
tCSS
tADH
WR (R/W)
tWRH
tWRH
VT
tADS
tADH
A0-10
D0-15
READ
MT9072
Inputs Address
VT
tADS
tDDR
ttDDHARZ
MT9072
Outputs Data
VT
tDSW
tDSH
tDSW
tDHW
D0-D15
WRITE
MT9072
Inputs Data
VT
Figure 29 - Intel Microprocessor Timing
AC Electrical Characteristics - JTAG Port Timing
Characteristic
1 TCK period width
2 TCK period width LOW
3 TCK period width HIGH
TDI setup time to TCK rising
TDI hold time after TCK rising
TMS setup time to TCK rising
TMS hold time after TCK rising
TDO delay from TCK falling
TRST pulse width
Sym. Min.
tTCLK 100
tTCLKL 40
tTCLKH 40
tDISU 12
tDIH
12
tMSSU 12
tMSH 12
tDOD
tTRST 25
Typ.
Max. Units
Test Conditions
ns BSDL specâs 12 MHz
ns
ns
50
244
Zarlink Semiconductor Inc.
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