MT9072 Datasheet, PDF (106/275 Pages) Zarlink Semiconductor Inc – Octal T1/E1/J1 Framer

MT9072
Data Sheet
16.4 JTAG Data Registers
As specified in IEEE 1149.1, the JTAG Interface must contain as a minimum the boundary scan register and the
bypass register. The device identification register although optional, is also included in the MT9072.
16.4.1 Identification Register
This is a 32 bit register as defined in Table 54. Note that the part number revision is not the same as the silicon
revision which is not supplied.
Version
(4 bits)
A
0000
0
Part Number
Manufacturer Identity
(16 bits)
(11 bits)
9072
Zarlink
1001 0000 0111 0010
0001 0100 101
9072
14B
0907214B
Table 54 - JTAG MT9072 Identification Register
LSB=1
(1 bit)
LSB=1
1
106
Zarlink Semiconductor Inc.