YGV638 Datasheet, PDF (22/26 Pages) YAMAHA CORPORATION – a pattern graphic controller with an on-chip VRAM and the ample drawing performance enables high-resolution animated GUIs on WVGA display panels.

■ Electrical Characteristics
● RAHZ_N
MA25-1, MD31-0
MOE_N,MWE_N
RAHZ_N
t_on/offRA
YGV638
t_on/offRA
The AC characteristics of an external memory connecting to VC2 must meet the following conditions.
(The following conditions are the values converted from the AC characteristics of the VC2 Pattern Memory;
they do not guarantee the following specifications directly. In addition, the item names below are those mainly
for an externally-connected memory.)
“F”, “R”, and “P” in the below are as follows.
F = (R#008h: FLTIM[1:0] + 1) Number of floating clocks
R = (R#009h: RDM[3:0] + 1) Number of random access clocks
P = (R#009h: PAG[2:0] + 1) Number of page mode access clocks
No.
Items
13 Address access time
14 Output enable time
15 Page mode access time
16 Data turn on time
17 Data turn off time
18 Data setup time
Symbol
t_ACC
t_OE
t_PACC
t_DO
t_DF
t_DS
Conditions
It should be (F + R) * t_cSY – t_dMA(max) – t_sMD(min) or less
It should be R * t_cSY – t_dOE(max) – t_sMD(min) or less
It should be P * t_cSY – t_dMA(max) – t_sMD(min) or less
It should be 0[ns] or over
It should be F * t_cSY - t_dOE(max) + t_dWE(min) or less
It should be R * t_cSY - t_dMD(max) + t_dWE(min) or less
SYCLK
MA25-(n+1)
MA(n)-1
MOE_N
MWE_N
MD31-0
F
R
tdMA(max)
tdOE(max)
tdWE(max)
tDS
thMOD
tAC C
tOE
tDO
P
tdMA(max)
tPACC
tdMA(max)
tdMA(max)
thMAR
tsMD(min)
thMDI
tsMD(min)
tDF
thMDI
SYCLK
MA25-(n+1)
MA(n)-1
MOE_N
MWE_N
MD31-0
F
tdMA(max)
R
tdMA(max)
tdOE(max)
tdWE(max)
tdMD(max)
tdWE(max)
tDS
th M D O
Note) After accesses, values of MA25–1 and MOE_N are held until the next access to the pattern memory.
4GV638A21
22