YGV638 Datasheet, PDF (20/26 Pages) YAMAHA CORPORATION – a pattern graphic controller with an on-chip VRAM and the ample drawing performance enables high-resolution animated GUIs on WVGA display panels.

■ Electrical Characteristics
YGV638
ii) Serial Interface
No.
Items
Symbol
Min.
Typ.
Max.
Unit Note
1 SCLK clock cycle time
t_wSCLK
2 SCLK clock high level pulse width
t_whSCLK
3 SCLK clock low level pulse width
t_wlSCLK
4 SCS_N: setup time
t_sSCS
5 SCS_N: hold time
t_hSCS
6 SDIN: setup time
t_sSDI
7 SDIN: hold time
t_hSDI
8 SDOUT: output data delay time
t_dSDO
9 SDOUT: turn off time
t_offfSDO
10 SCS_N: pulse inhibit time
t_iSCS
Note 1) Alternative value during VC2 initialization.
200
4 × t_cXIN
100
2 × t_cXIN
100
2 × t_cXIN
25
25
25
25
1, 2
1, 2
1, 2
ns
65
3
20
400
Note 2) tc_XIN is the period of a clock that is fed to XIN pin.
Note 3) During VC2 initialization, the maximum of t_dSDO becomes 17 ns plus 3 times the XIN input cycle.
SCS_N
t_sSCS
SCLK
SDIN
SDOUT ^Hi-Z
t_wlSCLK
t_wSCLK
t_whSCLK
t_sSDI t_hSDI
t_dSDO
t_dSDO
t_hSCS
t_offSDO
t_iSCS
SCS_N
SCLK
4GV638A21
20