YGV638 Datasheet, PDF (10/26 Pages) YAMAHA CORPORATION – a pattern graphic controller with an on-chip VRAM and the ample drawing performance enables high-resolution animated GUIs on WVGA display panels.

■ Block Diagram
YGV638
■ Block Diagram
Video Input
Analog
ACIN1
ACIN2
ARIN
AGIN
ABIN
AVSIN_N
AHSIN_N
VREFP
VREFN
VREF0
ADCKIN
ARCKIN
Digital
DRI7-2
DGI7-2
DBI7-2
DVSIN_N
DHSIN_N
DGCKIN
Pattern
Memory I/F
MD31-0
MA25-1
MOE_N
MWE_N
RAHZ_N
CPU I/F
D7-0
PS2-0
CS_N
RD_N
WR_N
WAIT_N
READY_N
INT_N
SDIN
SDOUT
SCS_N
SCLK
SER_N
Analog
Front
End
Video
Decoder
Analog
Video
Controller
Input
Video
Signal
Controller
Pattern
Data
Decoder
Sprite
Rendering
Processor
Line
Rendering
Processor
Line Buffer
F
Pixel Data
Controller
CRTC
Monitor I/F
DRO7-0
DGO7-0
DBO7-0
HCSYNC_N
VSYNC_N
BLANK_N
DOTCLK
CLKV
STARTH
STARTV
LOADH
POL
OUTENV
CPU
Interface
Sprite & Line Plane Generator
Color Palette
General
Table
Registers
To all
blocks
To all
blocks
Clock
Generator
Clock
XIN
XOUT
DTCKIN
PLLCTL3-0
4GV638A21
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