YGV638 Datasheet, PDF (17/26 Pages) YAMAHA CORPORATION – a pattern graphic controller with an on-chip VRAM and the ample drawing performance enables high-resolution animated GUIs on WVGA display panels.

■ Electrical Characteristics
ADCKIN
twhAD
V_IH
0.5×VDD33
t_cAD
V_IH
V_IL
twlAD
ARCKIN
twhAR
V_IH
0.5×VDD33
t_cAR
V_IH
V_IL
twlAR
YGV638
0.5×VDD33
V_IL
0.5×VDD33
V_IL
· Power Supply and Reset Input
No.
Items
Symbol
Min.
Typ.
Max.
Unit Note
1 RESET_N: input time
CPU access stand-by time after RESET_N
2
negation
t_wRES
t_wAW
10
1 to 6.7
μs 1
ms 2
3 RESET_N: setup time
t_sRES
0
ns 3
4 Power-on time difference
t_VSKWR
1
s4
5 Power-off time difference
t_VSKWF
1
s5
6 Power rise time
t_VRISE
200
ms
Note 1) The time from a point where a power supply powered up last VDD33 reaches at 3.0V, and VDD18 reaches at
1.7V, and the input clock to the XIN pin becomes stable.
Note 2) It is necessary to wait to access for 40000 × t_XIN time (cycle of the clock inputted into XIN pin) after
RESET_N negation as PLL lock-up time.
Note 3) The specified value of VDD which is raised up the earliest.
Note 4) It is preferable to turn on VDD33, VDD18, AVDD33, AVDD18, PLLVDD, and APLLVDD at the same time. If 1
second or more time-difference occurs among their power-on, it may affect the LSI’s reliability.
Note 5) It is preferable to turn off VDD33, VDD18, AVDD33, AVDD18, PLLVDD, and APLLVDD at the same time. If 1
second or more time-difference occurs among their power-off, it may affect the LSI’s reliability.
4GV638A21
17